The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
SDH(Synchronous Digital Hierarchy) 및 SONET(Synchronous Optical Network)은 TU(Tributary Unit) 또는 VT(Virtual Tributaries)를 통해 다양한 기존 신호 유형을 수용할 수 있는 광파 전송 시스템의 표준입니다. SDH 표준에서는 TU-11(Tributary Unit-11)이 페이로드 포인터 및 경로 오버헤드와 함께 DS1 신호를 전송하는 데 사용됩니다. 본 논문에서는 전송 및 수신 장치용 FPGA로 비동기 부동 모드 TU-11 Mapper를 설계했습니다. DS1 신호는 TU-11 프레임에 매핑되고 Combus 인터페이스를 통해 SDH의 바이트 순서 프레임 형식을 활용하여 VC-4 페이로드에 직접 추가/삭제됩니다. 추가 방향에서는 대기 시간 지터를 최소화하고 TU-11 데이터 페이로드의 주파수 오프셋, 순간 지터, 원더 및 갭을 흡수하도록 효율적인 스터핑 알고리즘을 갖춘 동기화 장치가 설계되었습니다. 드롭 방향에서는 새로운 모든 디지털 위상 고정 루프와 FIFO로 구현된 비동기화 장치를 사용하여 프레임 형식의 불규칙한 간격과 포인터 이동 및 비트 정렬로 인해 생성된 지터의 효과를 수용합니다. 프로토타입 회로 기판은 설계된 TU-11 Mapper로 제작되었으며 장기 테스트를 위해 STM-1 ADM 시스템에 내장되었습니다.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
부
Yeong-Gang SHOW, Kuo-Bing CHOU, Jim WANG, Kou-Tan WU, "Design of DS1 Transport Device in SDH Network" in IEICE TRANSACTIONS on Communications,
vol. E83-B, no. 7, pp. 1389-1399, July 2000, doi: .
Abstract: Synchronous Digital Hierarchy (SDH) and Synchronous Optical Network (SONET) are the standards for lightwave transmission systems, which can accommodate various existing signal types via Tributary Units (TUs) or Virtual Tributaries (VTs). In the SDH standards, Tributary Unit-11 (TU-11) is used to transport the DS1 signal with payload pointer and path overheads. In this paper, asynchronous floating mode TU-11 Mapper is designed by FPGAs for transmit and receive devices. The DS1 signal is mapped into TU-11 frame, and through Combus interface, then directly added/dropped into/from the VC-4 payload by taking advantage of the byte order frame format of SDH. In the add direction, a synchronizer with efficient stuffing algorithm is designed to minimize the waiting time jitter and absorb the frequency offset, the instantaneous jitter, the wander, and the gap of TU-11 data payload. In the drop direction, a desynchronizer implemented by a novel all digital phase locked loop and FIFO is used to accommodate the effect of irregular spacing of frame format and jitters generated by the pointer movement and bit justification. A prototype circuit board is built with the designed TU-11 Mapper and embedded in an STM-1 ADM system for long term testing.
URL: https://global.ieice.org/en_transactions/communications/10.1587/e83-b_7_1389/_p
부
@ARTICLE{e83-b_7_1389,
author={Yeong-Gang SHOW, Kuo-Bing CHOU, Jim WANG, Kou-Tan WU, },
journal={IEICE TRANSACTIONS on Communications},
title={Design of DS1 Transport Device in SDH Network},
year={2000},
volume={E83-B},
number={7},
pages={1389-1399},
abstract={Synchronous Digital Hierarchy (SDH) and Synchronous Optical Network (SONET) are the standards for lightwave transmission systems, which can accommodate various existing signal types via Tributary Units (TUs) or Virtual Tributaries (VTs). In the SDH standards, Tributary Unit-11 (TU-11) is used to transport the DS1 signal with payload pointer and path overheads. In this paper, asynchronous floating mode TU-11 Mapper is designed by FPGAs for transmit and receive devices. The DS1 signal is mapped into TU-11 frame, and through Combus interface, then directly added/dropped into/from the VC-4 payload by taking advantage of the byte order frame format of SDH. In the add direction, a synchronizer with efficient stuffing algorithm is designed to minimize the waiting time jitter and absorb the frequency offset, the instantaneous jitter, the wander, and the gap of TU-11 data payload. In the drop direction, a desynchronizer implemented by a novel all digital phase locked loop and FIFO is used to accommodate the effect of irregular spacing of frame format and jitters generated by the pointer movement and bit justification. A prototype circuit board is built with the designed TU-11 Mapper and embedded in an STM-1 ADM system for long term testing.},
keywords={},
doi={},
ISSN={},
month={July},}
부
TY - JOUR
TI - Design of DS1 Transport Device in SDH Network
T2 - IEICE TRANSACTIONS on Communications
SP - 1389
EP - 1399
AU - Yeong-Gang SHOW
AU - Kuo-Bing CHOU
AU - Jim WANG
AU - Kou-Tan WU
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E83-B
IS - 7
JA - IEICE TRANSACTIONS on Communications
Y1 - July 2000
AB - Synchronous Digital Hierarchy (SDH) and Synchronous Optical Network (SONET) are the standards for lightwave transmission systems, which can accommodate various existing signal types via Tributary Units (TUs) or Virtual Tributaries (VTs). In the SDH standards, Tributary Unit-11 (TU-11) is used to transport the DS1 signal with payload pointer and path overheads. In this paper, asynchronous floating mode TU-11 Mapper is designed by FPGAs for transmit and receive devices. The DS1 signal is mapped into TU-11 frame, and through Combus interface, then directly added/dropped into/from the VC-4 payload by taking advantage of the byte order frame format of SDH. In the add direction, a synchronizer with efficient stuffing algorithm is designed to minimize the waiting time jitter and absorb the frequency offset, the instantaneous jitter, the wander, and the gap of TU-11 data payload. In the drop direction, a desynchronizer implemented by a novel all digital phase locked loop and FIFO is used to accommodate the effect of irregular spacing of frame format and jitters generated by the pointer movement and bit justification. A prototype circuit board is built with the designed TU-11 Mapper and embedded in an STM-1 ADM system for long term testing.
ER -