The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
8Gb/s 광통신 시스템을 위한 ECL(Emitter Coupled Logic) 호환 저전력 GaAs 1:1 멀티플렉서(MUX) 및 8:10 디멀티플렉서(DEMUX)가 개발되었습니다. 전력 소모를 줄이고 타이밍 마진을 극대화하기 위해 DCFL(직접 결합 FET 로직) 및 SCFL(소스 결합 FET 로직) 회로의 전력 소모를 D형 플립플롭(D)으로 추정했습니다. -FF) 작동 속도 및 듀티비 변화. 그 결과를 바탕으로 클럭 생성 회로와 10Gb/s로 동작하는 회로에는 SCFL 회로를 사용하였고, 5Gb/s 이하로 동작하는 회로에는 DCFL 회로를 사용하였다. 세라믹 패키지에 탑재된 이 IC는 10:1.2 MUX의 경우 8W, 1:1.0 DEMUX의 경우 1W의 전력 소비로 최대 8Gb/s에서 작동합니다. 이는 10Gb/s 8:1 MUX 및 1:8 DEMUX에 대해 보고된 최저 전력 소비입니다.
Nobuhide YOSHIDA
Masahiro FUJII
Takao ATSUMO
Keiichi NUMATA
Shuji ASAI
Michihisa KOHNO
Hirokazu OIKAWA
Hiroaki TSUTSUI
Tadashi MAEDA
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Nobuhide YOSHIDA, Masahiro FUJII, Takao ATSUMO, Keiichi NUMATA, Shuji ASAI, Michihisa KOHNO, Hirokazu OIKAWA, Hiroaki TSUTSUI, Tadashi MAEDA, "ECL-Compatible Low-Power-Consumption 10-Gb/s GaAs 8:1 Multiplexer and 1:8 Demultiplexer" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 11, pp. 1992-1999, November 1999, doi: .
Abstract: An emitter coupled logic (ECL) compatible low-power GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) for 10-Gb/s optical communication systems has been developed. In order to decrease the power consumption and to maximize the timing margin, we estimated the power consumption for direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) circuits in terms of the D-type flip-flop (D-FF) operating speed and the duty-ratio variation. Based on the result, we used SCFL circuits in the clock-generating circuit and the circuits operating at 10 Gb/s, and we used DCFL circuits in the circuits operating below 5 Gb/s. These ICs, which are mounted on ceramic packages, operate at up to 10 Gb/s with power consumption of 1.2 W for the 8:1 MUX and 1.0 W for the 1:8 DEMUX. This is the lowest power consumption yet reported for 10-Gb/s 8:1 MUX and 1:8 DEMUX.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_11_1992/_p
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@ARTICLE{e82-c_11_1992,
author={Nobuhide YOSHIDA, Masahiro FUJII, Takao ATSUMO, Keiichi NUMATA, Shuji ASAI, Michihisa KOHNO, Hirokazu OIKAWA, Hiroaki TSUTSUI, Tadashi MAEDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={ECL-Compatible Low-Power-Consumption 10-Gb/s GaAs 8:1 Multiplexer and 1:8 Demultiplexer},
year={1999},
volume={E82-C},
number={11},
pages={1992-1999},
abstract={An emitter coupled logic (ECL) compatible low-power GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) for 10-Gb/s optical communication systems has been developed. In order to decrease the power consumption and to maximize the timing margin, we estimated the power consumption for direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) circuits in terms of the D-type flip-flop (D-FF) operating speed and the duty-ratio variation. Based on the result, we used SCFL circuits in the clock-generating circuit and the circuits operating at 10 Gb/s, and we used DCFL circuits in the circuits operating below 5 Gb/s. These ICs, which are mounted on ceramic packages, operate at up to 10 Gb/s with power consumption of 1.2 W for the 8:1 MUX and 1.0 W for the 1:8 DEMUX. This is the lowest power consumption yet reported for 10-Gb/s 8:1 MUX and 1:8 DEMUX.},
keywords={},
doi={},
ISSN={},
month={November},}
부
TY - JOUR
TI - ECL-Compatible Low-Power-Consumption 10-Gb/s GaAs 8:1 Multiplexer and 1:8 Demultiplexer
T2 - IEICE TRANSACTIONS on Electronics
SP - 1992
EP - 1999
AU - Nobuhide YOSHIDA
AU - Masahiro FUJII
AU - Takao ATSUMO
AU - Keiichi NUMATA
AU - Shuji ASAI
AU - Michihisa KOHNO
AU - Hirokazu OIKAWA
AU - Hiroaki TSUTSUI
AU - Tadashi MAEDA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 1999
AB - An emitter coupled logic (ECL) compatible low-power GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) for 10-Gb/s optical communication systems has been developed. In order to decrease the power consumption and to maximize the timing margin, we estimated the power consumption for direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) circuits in terms of the D-type flip-flop (D-FF) operating speed and the duty-ratio variation. Based on the result, we used SCFL circuits in the clock-generating circuit and the circuits operating at 10 Gb/s, and we used DCFL circuits in the circuits operating below 5 Gb/s. These ICs, which are mounted on ceramic packages, operate at up to 10 Gb/s with power consumption of 1.2 W for the 8:1 MUX and 1.0 W for the 1:8 DEMUX. This is the lowest power consumption yet reported for 10-Gb/s 8:1 MUX and 1:8 DEMUX.
ER -