The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
우리는 VLSI 제조 최종 테스트 프로세스에서 생산 파견 규칙 일정 및 비용에 대한 익스프레스 로트의 영향을 평가합니다. 특급 로트 배정 시 널리 사용되는 FIFO(First In First Out) 규칙과 지그 및 온도 교환에 소요되는 시간, 기계의 남은 처리 시간을 고려하는 WEIGHT+RPM 규칙을 비교합니다. 사용 및 대기열의 대기 시간. FIFO 규칙을 사용할 경우, 특급 로트의 함량이 15%를 초과하면 테스트 효율이 떨어지기 시작하고 칩당 테스트 비용이 증가하기 시작합니다. 또한, 특급 로트 함량이 30%인 경우 특급 로트가 없는 경우에 비해 전체 처리 로트 수가 19% 감소하고, 칩당 테스트 비용이 22% 증가하는 것으로 나타났다. 그러나 WEIGHT+RPM 규칙의 경우, 특급 로트의 함량을 50%까지 증가시켜도 테스트 효율성이 저하되지 않으며 칩당 테스트 비용도 증가하지 않습니다. WEIGHT+RPM 규칙을 사용할 경우, 시스템 특성의 5% 저하를 허용하는 특급 로트의 최대 함량으로 정의되는 ELT(Express Lot Tolerances)는 FIFO 규칙을 사용할 때보다 약 XNUMX배 높습니다. 또한 WEIGHT+RPM 규칙은 FIFO 규칙에 비해 계획된 칩 수와 준비된 지그 수의 변화에 대해 더 높은 ELT를 유지하는 것으로 나타났습니다.
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Akihisa CHIKAMURA, Koji NAKAMAE, Hiromu FUJIOKA, "Effect of Express Lots on Production Dispatching Rule Scheduling and Cost in VLSI Manufacturing Final Test Process" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 1, pp. 86-93, January 1999, doi: .
Abstract: we evaluate the effect of express lots on production dispatching rule scheduling and cost in VLSI manufacturing final test process. In the assignment of express lots, we make comparisons of two rules, First In First Out (FIFO) rule which is widely used and WEIGHT+RPM rule which considers the time required for jig and temperature exchanges, the remaining processing time of the machine in use and the lot waiting time in queue. When using FIFO rule, the test efficiency begins to deteriorate and the test cost per chip begins to increase, if the content of express lots exceeds 15%. Furthermore, for 30% of express lots' content, the number of total processed lots decreases by 19% and the test cost per chip increases by 22% in comparison to the cases including no express lots. For WEIGHT+RPM rule, however, the test efficiency does not deteriorate and the test cost per chip does not increase even if the content of express lots is increased up to 50%. When we use WEIGHT+RPM rule, Express Lots Tolerances (ELTs), defined as the maximum content of express lots which permits the deterioration of the system characteristics by 5%, are about three times as high as ones when using FIFO rule. It is also found that WEIGHT+RPM rule maintains higher ELTs against the changes in the numbers of planned chips and prepared jigs as compared with FIFO rule.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_1_86/_p
부
@ARTICLE{e82-c_1_86,
author={Akihisa CHIKAMURA, Koji NAKAMAE, Hiromu FUJIOKA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Effect of Express Lots on Production Dispatching Rule Scheduling and Cost in VLSI Manufacturing Final Test Process},
year={1999},
volume={E82-C},
number={1},
pages={86-93},
abstract={we evaluate the effect of express lots on production dispatching rule scheduling and cost in VLSI manufacturing final test process. In the assignment of express lots, we make comparisons of two rules, First In First Out (FIFO) rule which is widely used and WEIGHT+RPM rule which considers the time required for jig and temperature exchanges, the remaining processing time of the machine in use and the lot waiting time in queue. When using FIFO rule, the test efficiency begins to deteriorate and the test cost per chip begins to increase, if the content of express lots exceeds 15%. Furthermore, for 30% of express lots' content, the number of total processed lots decreases by 19% and the test cost per chip increases by 22% in comparison to the cases including no express lots. For WEIGHT+RPM rule, however, the test efficiency does not deteriorate and the test cost per chip does not increase even if the content of express lots is increased up to 50%. When we use WEIGHT+RPM rule, Express Lots Tolerances (ELTs), defined as the maximum content of express lots which permits the deterioration of the system characteristics by 5%, are about three times as high as ones when using FIFO rule. It is also found that WEIGHT+RPM rule maintains higher ELTs against the changes in the numbers of planned chips and prepared jigs as compared with FIFO rule.},
keywords={},
doi={},
ISSN={},
month={January},}
부
TY - JOUR
TI - Effect of Express Lots on Production Dispatching Rule Scheduling and Cost in VLSI Manufacturing Final Test Process
T2 - IEICE TRANSACTIONS on Electronics
SP - 86
EP - 93
AU - Akihisa CHIKAMURA
AU - Koji NAKAMAE
AU - Hiromu FUJIOKA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 1999
AB - we evaluate the effect of express lots on production dispatching rule scheduling and cost in VLSI manufacturing final test process. In the assignment of express lots, we make comparisons of two rules, First In First Out (FIFO) rule which is widely used and WEIGHT+RPM rule which considers the time required for jig and temperature exchanges, the remaining processing time of the machine in use and the lot waiting time in queue. When using FIFO rule, the test efficiency begins to deteriorate and the test cost per chip begins to increase, if the content of express lots exceeds 15%. Furthermore, for 30% of express lots' content, the number of total processed lots decreases by 19% and the test cost per chip increases by 22% in comparison to the cases including no express lots. For WEIGHT+RPM rule, however, the test efficiency does not deteriorate and the test cost per chip does not increase even if the content of express lots is increased up to 50%. When we use WEIGHT+RPM rule, Express Lots Tolerances (ELTs), defined as the maximum content of express lots which permits the deterioration of the system characteristics by 5%, are about three times as high as ones when using FIFO rule. It is also found that WEIGHT+RPM rule maintains higher ELTs against the changes in the numbers of planned chips and prepared jigs as compared with FIFO rule.
ER -