The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
무선 통신이 전 세계 곳곳으로 확산됨에 따라 RF, 전력 반도체 장치에 대한 최적의 설계와 정확한 분석은 EDA 및 TCAD(Technology CAD) 도구 개발에 있어서 가장 큰 과제 중 하나가 되었습니다. 이러한 장치의 성능 게이지는 전력 이득, 효율 및 왜곡(또는 선형성 범위)이 최고의 설계 고려 사항이라는 점에서 소신호 애플리케이션을 목표로 하는 디지털 또는 아날로그 장치의 성능 게이지와 상당히 다릅니다. 이 기사에서는 장치 시뮬레이션 수준에서 대규모 신호 왜곡의 수치 분석을 위한 방법론과 수학적 기초에 대해 논의합니다. 고조파 균형(HB) 방법은 오랫동안 대신호 왜곡 분석을 위한 회로 시뮬레이션에 사용되어 왔지만, 장치 시뮬레이션에서 동일한 방법을 구현하는 것은 엄청난 계산 비용과 메모리 저장 관리 등 어려운 과제에 직면해 있습니다. 그러나 이러한 장치 수준 시뮬레이션을 수행함으로써 얻을 수 있는 이점도 분명합니다. 최초로 대규모 신호 성능에 대한 기술 및 장치의 구조적 변화가 미치는 영향을 직접 평가할 수 있습니다. 장치 시뮬레이션에서 HB 분석을 실행 가능하게 만드는 데 필요한 단계를 간략하게 설명하고 계산/저장 부담을 완화하기 위한 알고리즘 개선에 대해 논의합니다. GaAs MESFET 및 실리콘 LDMOS(측면 확산 MOS)를 포함한 다양한 RF 전력 소자에 대한 소자 시뮬레이터의 응용을 제시하고 이러한 분석을 통해 얻은 통찰력을 제공합니다.
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Zhiping YU, Robert W. DUTTON, Boris TROYANOSKY, Junko SATO-IWANAGA, "Large Signal Analysis of RF Circuits in Device Simulation" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 6, pp. 908-916, June 1999, doi: .
Abstract: As wireless communication is penetrating every corner of the globe, the optimum design and accurate analysis of RF, power semiconductor devices become one of the biggest challenges in EDA and TCAD (Technology CAD) tool development. The performance gauge for these devices is quite different from that for either digital or analog devices aimed at small-signal applications in that the power gain, efficiency, and distortion (or the range of linearity) are the utmost design concerns. In this article, the methodology and mathematical foundation for numerical analysis of large signal distortion at the device simulation level are discussed. Although the harmonic balance (HB) method has long been used in circuit simulation for large signal distortion analysis, the implementation of the same method in device simulation faces daunting challenges, among which are the tremendous computational cost and memory storage management. But the benefits from conducting such a device level simulation are also obvious--for the first time, the impact of technology and structural variation of device on large signal performance can directly be assessed. The necessary steps to make the HB analysis feasible in device simulation are outlined and algorithmic improvement to ease the computation/storage burden is discussed. The applications of the device simulator for various RF power devices, including GaAs MESFETs and silicon LDMOS (lateral diffusion MOS) are presented, and the insight gained from such an analysis is provided.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_6_908/_p
부
@ARTICLE{e82-c_6_908,
author={Zhiping YU, Robert W. DUTTON, Boris TROYANOSKY, Junko SATO-IWANAGA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Large Signal Analysis of RF Circuits in Device Simulation},
year={1999},
volume={E82-C},
number={6},
pages={908-916},
abstract={As wireless communication is penetrating every corner of the globe, the optimum design and accurate analysis of RF, power semiconductor devices become one of the biggest challenges in EDA and TCAD (Technology CAD) tool development. The performance gauge for these devices is quite different from that for either digital or analog devices aimed at small-signal applications in that the power gain, efficiency, and distortion (or the range of linearity) are the utmost design concerns. In this article, the methodology and mathematical foundation for numerical analysis of large signal distortion at the device simulation level are discussed. Although the harmonic balance (HB) method has long been used in circuit simulation for large signal distortion analysis, the implementation of the same method in device simulation faces daunting challenges, among which are the tremendous computational cost and memory storage management. But the benefits from conducting such a device level simulation are also obvious--for the first time, the impact of technology and structural variation of device on large signal performance can directly be assessed. The necessary steps to make the HB analysis feasible in device simulation are outlined and algorithmic improvement to ease the computation/storage burden is discussed. The applications of the device simulator for various RF power devices, including GaAs MESFETs and silicon LDMOS (lateral diffusion MOS) are presented, and the insight gained from such an analysis is provided.},
keywords={},
doi={},
ISSN={},
month={June},}
부
TY - JOUR
TI - Large Signal Analysis of RF Circuits in Device Simulation
T2 - IEICE TRANSACTIONS on Electronics
SP - 908
EP - 916
AU - Zhiping YU
AU - Robert W. DUTTON
AU - Boris TROYANOSKY
AU - Junko SATO-IWANAGA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 1999
AB - As wireless communication is penetrating every corner of the globe, the optimum design and accurate analysis of RF, power semiconductor devices become one of the biggest challenges in EDA and TCAD (Technology CAD) tool development. The performance gauge for these devices is quite different from that for either digital or analog devices aimed at small-signal applications in that the power gain, efficiency, and distortion (or the range of linearity) are the utmost design concerns. In this article, the methodology and mathematical foundation for numerical analysis of large signal distortion at the device simulation level are discussed. Although the harmonic balance (HB) method has long been used in circuit simulation for large signal distortion analysis, the implementation of the same method in device simulation faces daunting challenges, among which are the tremendous computational cost and memory storage management. But the benefits from conducting such a device level simulation are also obvious--for the first time, the impact of technology and structural variation of device on large signal performance can directly be assessed. The necessary steps to make the HB analysis feasible in device simulation are outlined and algorithmic improvement to ease the computation/storage burden is discussed. The applications of the device simulator for various RF power devices, including GaAs MESFETs and silicon LDMOS (lateral diffusion MOS) are presented, and the insight gained from such an analysis is provided.
ER -