The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
본 연구에서는 메모리, 연산 증폭기, 비교기 및 데이터 변환기를 위한 CMOS 온칩 전류 기준 회로를 제안합니다. 기준 전류는 온도 및 공급 전압 변화에 거의 영향을 받지 않습니다. 제안된 회로에서 양의 온도 계수를 갖는 전류 성분은 음의 온도 계수를 갖는 전류 성분을 서로 상쇄시킨다. 기존의 전류 기준 회로는 BiCMOS, 바이폴라 또는 CMOS 프로세스의 바이폴라 트랜지스터를 기반으로 하는 반면, 제안된 회로는 표준 CMOS 프로세스를 사용하여 다른 디지털 및 아날로그 회로와 함께 단일 칩에 통합될 수 있으며 추가 마스크가 필요하지 않습니다. 측정 결과는 두 가지 다른 프로토타입에 대해 시연됩니다. 첫 번째는 1.0μm p-well 이중 폴리 이중 금속 CMOS 프로세스를 사용하여 제작되었으며 공칭 5V에서 작동합니다. 두 번째는 0.6 µm n웰 프로세스를 기반으로 하며 3V ~ 5V 작동에 최적화되어 있습니다. 후자의 프로토타입은 98ppm/의 온도 계수를 달성합니다.
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부
Seung-Hoon LEE, Yong JEE, "A Temperature and Supply-Voltage Insensitive CMOS Current Reference" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 8, pp. 1562-1566, August 1999, doi: .
Abstract: In this work, a CMOS on-chip current reference circuit for memory, operational amplifiers, comparators, and data converters is proposed. The reference current is nearly insensitive to temperature and supply-voltage variations. In the proposed circuit, the current component with a positive temperature coefficient cancels that with a negative temperature coefficient each other. While conventional current reference circuits are based on bipolar transistors in BiCMOS, bipolar, or CMOS processes, the proposed circuit can be integrated on a single chip with other digital and analog circuits using a standard CMOS process and extra masks are not required. Measured results are demonstrated for two different prototypes. The first is fabricated employing a 1.0 µm p-well double-poly double-metal CMOS process and operates at 5 V nominally. The second, based on a 0.6 µm n-well process, is optimized for 3 V to 5 V operation. The latter prototype achieves the temperature coefficient of 98 ppm/
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_8_1562/_p
부
@ARTICLE{e82-c_8_1562,
author={Seung-Hoon LEE, Yong JEE, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Temperature and Supply-Voltage Insensitive CMOS Current Reference},
year={1999},
volume={E82-C},
number={8},
pages={1562-1566},
abstract={In this work, a CMOS on-chip current reference circuit for memory, operational amplifiers, comparators, and data converters is proposed. The reference current is nearly insensitive to temperature and supply-voltage variations. In the proposed circuit, the current component with a positive temperature coefficient cancels that with a negative temperature coefficient each other. While conventional current reference circuits are based on bipolar transistors in BiCMOS, bipolar, or CMOS processes, the proposed circuit can be integrated on a single chip with other digital and analog circuits using a standard CMOS process and extra masks are not required. Measured results are demonstrated for two different prototypes. The first is fabricated employing a 1.0 µm p-well double-poly double-metal CMOS process and operates at 5 V nominally. The second, based on a 0.6 µm n-well process, is optimized for 3 V to 5 V operation. The latter prototype achieves the temperature coefficient of 98 ppm/
keywords={},
doi={},
ISSN={},
month={August},}
부
TY - JOUR
TI - A Temperature and Supply-Voltage Insensitive CMOS Current Reference
T2 - IEICE TRANSACTIONS on Electronics
SP - 1562
EP - 1566
AU - Seung-Hoon LEE
AU - Yong JEE
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 1999
AB - In this work, a CMOS on-chip current reference circuit for memory, operational amplifiers, comparators, and data converters is proposed. The reference current is nearly insensitive to temperature and supply-voltage variations. In the proposed circuit, the current component with a positive temperature coefficient cancels that with a negative temperature coefficient each other. While conventional current reference circuits are based on bipolar transistors in BiCMOS, bipolar, or CMOS processes, the proposed circuit can be integrated on a single chip with other digital and analog circuits using a standard CMOS process and extra masks are not required. Measured results are demonstrated for two different prototypes. The first is fabricated employing a 1.0 µm p-well double-poly double-metal CMOS process and operates at 5 V nominally. The second, based on a 0.6 µm n-well process, is optimized for 3 V to 5 V operation. The latter prototype achieves the temperature coefficient of 98 ppm/
ER -