The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
저전력 설계는 현대 LSI 시스템 설계에서 실질적으로나 이론적으로 매력적인 주제로 떠올랐습니다. 본 논문에서는 시스템 수준의 전력 최적화 기술을 제시합니다. 시스템 수준 저전력 설계 접근 방식에 대한 간략한 조사와 여러 가지 예를 자세히 설명합니다. 전력 문제를 극복하기 위해 제안된 몇 가지 기술을 검토하고 향후 시스템 수준 솔루션에 대한 지침을 제공합니다.
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부
Hiroto YASUURA, Tohru ISHIHARA, "System LSI Design Methods for Low Power LSIs" in IEICE TRANSACTIONS on Electronics,
vol. E83-C, no. 2, pp. 143-152, February 2000, doi: .
Abstract: Low Power design has emerged as a both practically and theoretically attractive theme in modern LSI system design. This paper presents system level power optimization techniques. A brief survey of system level low power design approaches and several examples in detail are described. It reviews some techniques that have been proposed to overcome the power issue and gives guideline for prospective system level solutions.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e83-c_2_143/_p
부
@ARTICLE{e83-c_2_143,
author={Hiroto YASUURA, Tohru ISHIHARA, },
journal={IEICE TRANSACTIONS on Electronics},
title={System LSI Design Methods for Low Power LSIs},
year={2000},
volume={E83-C},
number={2},
pages={143-152},
abstract={Low Power design has emerged as a both practically and theoretically attractive theme in modern LSI system design. This paper presents system level power optimization techniques. A brief survey of system level low power design approaches and several examples in detail are described. It reviews some techniques that have been proposed to overcome the power issue and gives guideline for prospective system level solutions.},
keywords={},
doi={},
ISSN={},
month={February},}
부
TY - JOUR
TI - System LSI Design Methods for Low Power LSIs
T2 - IEICE TRANSACTIONS on Electronics
SP - 143
EP - 152
AU - Hiroto YASUURA
AU - Tohru ISHIHARA
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E83-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 2000
AB - Low Power design has emerged as a both practically and theoretically attractive theme in modern LSI system design. This paper presents system level power optimization techniques. A brief survey of system level low power design approaches and several examples in detail are described. It reviews some techniques that have been proposed to overcome the power issue and gives guideline for prospective system level solutions.
ER -