The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
InGaP/InGaAs 도핑 채널 FET(DCFET)의 높은 장벽 쇼트키 게이트는 높은 전류 밀도, 높은 게이트-드레인 항복 전압 및 넓은 게이트 바이어스 범위에서 더 나은 선형 작동을 제공합니다. 그러나 이러한 도핑된 채널 장치는 게이트 금속 아래의 20nm 두께의 도핑되지 않은 InGaP 층과 관련된 큰 기생 저항에 의해 제한됩니다. 본 연구에서는 기생 저항을 줄이고 장치 DC 및 RF 전력 성능을 향상시키기 위해 높은 밴드갭 비도핑 InGaP 층 내부에 Si δ 도핑 층을 삽입했습니다. 이러한 수정된 DCFET(M-DCFET)는 204GHz 작동에서 45mm 게이트 폭 장치에 대해 18.3mW/mm의 출력 전력 밀도, 1%의 전력 추가 효율, 2.4dB의 선형 전력 이득을 보여주었습니다. 이러한 특성은 Si δ 도핑층을 갖춘 도핑 채널 FET가 고전력 마이크로파 장치 응용 분야에 좋은 잠재력을 제공한다는 것을 시사합니다.
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Hsien-Chin CHIU, Shih-Cheng YANG, Yi-Jen CHAN, Hao-Hsiung LIN, "High Power In0.49Ga0.51P/In0.15Ga0.85As Heterostructure Doped-Channel FETs" in IEICE TRANSACTIONS on Electronics,
vol. E84-C, no. 10, pp. 1312-1317, October 2001, doi: .
Abstract: A high barrier Schottky gate on InGaP/InGaAs doped-channel FETs (DCFETs) provides a high current density, high gate-to-drain breakdown voltage and a better linear operation over a wide gate bias range. However, these doped-channel devices are limited by a large parasitic resistance associated with a 20 nm thick undoped InGaP layer beneath the gate metal. In this study, we inserted a Si δ-doped layer inside this high bandgap undoped InGaP layer to reduce parasitic resistances and to enhance device DC and RF power performance. These modified DCFETs (M-DCFETs) demonstrated an output power density of 204 mW/mm, a power-added efficiency of 45%, and a linear power gain of 18.3 dB for an 1 mm gate-width device under a 2.4 GHz operation. These characteristics suggest that doped-channel FETs with a Si δ-doped layer provide a good potential for high power microwave device applications.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e84-c_10_1312/_p
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@ARTICLE{e84-c_10_1312,
author={Hsien-Chin CHIU, Shih-Cheng YANG, Yi-Jen CHAN, Hao-Hsiung LIN, },
journal={IEICE TRANSACTIONS on Electronics},
title={High Power In0.49Ga0.51P/In0.15Ga0.85As Heterostructure Doped-Channel FETs},
year={2001},
volume={E84-C},
number={10},
pages={1312-1317},
abstract={A high barrier Schottky gate on InGaP/InGaAs doped-channel FETs (DCFETs) provides a high current density, high gate-to-drain breakdown voltage and a better linear operation over a wide gate bias range. However, these doped-channel devices are limited by a large parasitic resistance associated with a 20 nm thick undoped InGaP layer beneath the gate metal. In this study, we inserted a Si δ-doped layer inside this high bandgap undoped InGaP layer to reduce parasitic resistances and to enhance device DC and RF power performance. These modified DCFETs (M-DCFETs) demonstrated an output power density of 204 mW/mm, a power-added efficiency of 45%, and a linear power gain of 18.3 dB for an 1 mm gate-width device under a 2.4 GHz operation. These characteristics suggest that doped-channel FETs with a Si δ-doped layer provide a good potential for high power microwave device applications.},
keywords={},
doi={},
ISSN={},
month={October},}
부
TY - JOUR
TI - High Power In0.49Ga0.51P/In0.15Ga0.85As Heterostructure Doped-Channel FETs
T2 - IEICE TRANSACTIONS on Electronics
SP - 1312
EP - 1317
AU - Hsien-Chin CHIU
AU - Shih-Cheng YANG
AU - Yi-Jen CHAN
AU - Hao-Hsiung LIN
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E84-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2001
AB - A high barrier Schottky gate on InGaP/InGaAs doped-channel FETs (DCFETs) provides a high current density, high gate-to-drain breakdown voltage and a better linear operation over a wide gate bias range. However, these doped-channel devices are limited by a large parasitic resistance associated with a 20 nm thick undoped InGaP layer beneath the gate metal. In this study, we inserted a Si δ-doped layer inside this high bandgap undoped InGaP layer to reduce parasitic resistances and to enhance device DC and RF power performance. These modified DCFETs (M-DCFETs) demonstrated an output power density of 204 mW/mm, a power-added efficiency of 45%, and a linear power gain of 18.3 dB for an 1 mm gate-width device under a 2.4 GHz operation. These characteristics suggest that doped-channel FETs with a Si δ-doped layer provide a good potential for high power microwave device applications.
ER -