The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
본 논문에서는 광전자 이산 상관 프로세서(OEDCP)를 위한 파이프라인 디지털 상관기(PDC)의 설계 및 제작에 대해 보고합니다. OEDCP는 광학 팬인 및 팬아웃 상호 연결 시스템과 광학 I/O 포트가 있는 여러 개의 PDC로 구성됩니다. OEDCP는 광학과 전자의 정교한 조합으로 높은 처리 성능을 달성합니다. OEDCP의 처리 엔진인 PDC의 프로토타입을 설계 및 제작합니다. 프로토타입의 경우 입력 이미지와 출력 이미지의 픽셀 수는 8입니다.
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Kouichi NITTA, Keiichiro KAGAWA, Jun TANIDA, "Design and Fabrication of Pipelined Digital Correlator for Opto-Electronic Discrete Correlation Processor" in IEICE TRANSACTIONS on Electronics,
vol. E84-C, no. 3, pp. 312-317, March 2001, doi: .
Abstract: In this paper, we report on design and fabrication of the pipelined digital correlator (PDC) for the opto-electronic discrete correlation processor (OEDCP). The OEDCP consists of optical fan-in and fan-out interconnection systems and several number of PDC's with optical I/O ports. The OEDCP achieves high processing performance with sophisticated combination of optics and electronics. We design and fabricate a prototype of the PDC which is the processing engine of the OEDCP. For the prototype, the pixel number of the input and the output images is 8
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e84-c_3_312/_p
부
@ARTICLE{e84-c_3_312,
author={Kouichi NITTA, Keiichiro KAGAWA, Jun TANIDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Design and Fabrication of Pipelined Digital Correlator for Opto-Electronic Discrete Correlation Processor},
year={2001},
volume={E84-C},
number={3},
pages={312-317},
abstract={In this paper, we report on design and fabrication of the pipelined digital correlator (PDC) for the opto-electronic discrete correlation processor (OEDCP). The OEDCP consists of optical fan-in and fan-out interconnection systems and several number of PDC's with optical I/O ports. The OEDCP achieves high processing performance with sophisticated combination of optics and electronics. We design and fabricate a prototype of the PDC which is the processing engine of the OEDCP. For the prototype, the pixel number of the input and the output images is 8
keywords={},
doi={},
ISSN={},
month={March},}
부
TY - JOUR
TI - Design and Fabrication of Pipelined Digital Correlator for Opto-Electronic Discrete Correlation Processor
T2 - IEICE TRANSACTIONS on Electronics
SP - 312
EP - 317
AU - Kouichi NITTA
AU - Keiichiro KAGAWA
AU - Jun TANIDA
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E84-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2001
AB - In this paper, we report on design and fabrication of the pipelined digital correlator (PDC) for the opto-electronic discrete correlation processor (OEDCP). The OEDCP consists of optical fan-in and fan-out interconnection systems and several number of PDC's with optical I/O ports. The OEDCP achieves high processing performance with sophisticated combination of optics and electronics. We design and fabricate a prototype of the PDC which is the processing engine of the OEDCP. For the prototype, the pixel number of the input and the output images is 8
ER -