The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
본 논문에서는 인터넷 트래픽과 같이 빠르게 증가하는 멀티미디어 트래픽을 경제적으로 처리할 수 있는 2.56-Terabit/s 광전자 스위칭 패브릭 기반의 Photonic Core Node를 제안합니다. 우리는 Photonic Core Node의 첫 번째 프로토타입을 성공적으로 개발했습니다. 프로토타입은 단일 스테이지 풀 크로스바 광전자 스위칭 패브릭, 입력 큐잉을 위한 슈퍼 패킷 버퍼 및 비동기화된 라운드 로빈 스케줄러로 구성됩니다. 스위칭 패브릭은 최대 2.56Tb/s까지 업그레이드할 수 있으며 파장 분할 다중화 기술을 사용하여 광 스위칭 요소의 총 수를 기존 스위칭 패브릭에 사용되는 수의 16/32로 대폭 줄입니다. 슈퍼 패킷 버퍼는 동일한 출력 포트로 라우팅되는 2.9개의 ATM 셀을 단일 고정 길이 패킷으로 조립합니다. 슈퍼 패킷 스위칭 방식은 광 스위칭 오버헤드를 100%에서 XNUMX%로 크게 줄이지만 유효 처리량을 감소시키는 경향이 있습니다. 비동기화된 라운드 로빈 스케줄러는 무작위 트래픽에 대해 거의 XNUMX%의 유효 처리량을 유지하여 라운드 로빈 방식으로 공정성을 유지하면서 하나의 스케줄링 루틴에서 연결 요청 경합을 반복적으로 해결합니다. 제안된 포토닉 코어 노드는 광 스위치가 비트 전송률/형식에 독립적이기 때문에 IP 입력 버퍼 인터페이스를 사용하여 ATM 스위칭뿐만 아니라 WDM 광 경로 그루밍/다중화, IP 라우팅도 수용할 수 있다.
Soichiro ARAKI
Naoya HENMI
Yoshiharu MAENO
Kazuhiko MATSUDA
Osamu NAKAKUBO
Masayuki SHINOHARA
Yoshihiko SUEMURA
Akio TAJIMA
Hiroaki TAKAHASHI
Seigo TAKAHASHI
Hiromi KOGANEMARU
Ken-ichi SAISHO
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Soichiro ARAKI, Naoya HENMI, Yoshiharu MAENO, Kazuhiko MATSUDA, Osamu NAKAKUBO, Masayuki SHINOHARA, Yoshihiko SUEMURA, Akio TAJIMA, Hiroaki TAKAHASHI, Seigo TAKAHASHI, Hiromi KOGANEMARU, Ken-ichi SAISHO, "Photonic Core Node Based on a 2.56-Terabit/s Opto-Electronic Switching Fabric" in IEICE TRANSACTIONS on Electronics,
vol. E84-C, no. 5, pp. 485-492, May 2001, doi: .
Abstract: This paper proposes Photonic Core Node based on a 2.56-Terabit/s opto-electronic switching fabric, which can economically handle the rapidly increasing multimedia traffics, such as Internet traffic. We have successfully developed the first prototype of Photonic Core Node. The prototype consists of a single-stage full-crossbar opto-electronic switching fabric, super-packet buffers for input queuing, and a desynchronized-round-robin scheduler. The switching fabric is upgradable up to 2.56 Tb/s, and employs wavelength-division-multiplexing techniques, which dramatically reduce the total number of optical switching elements down to one-eighth the number of those used in a conventional switching fabric. The super-packet buffer assembles 16 ATM cells routed to the same output port into a single fixed-length packet. The super-packet-switching scheme drastically reduces the overhead of optical switching from 32 to 2.9%, although it tends to decrease effective throughput. The desynchronized-round-robin scheduler maintains nearly 100% effective throughput for random traffic, recursively resolving the contention of connection requests in one scheduling routine while keeping fairness in a round robin manner. The proposed Photonic Core Node can accommodate not only ATM switching but also WDM optical path grooming/multiplexing, and IP routing by using IP input buffer interfaces, because optical switches are bit-rate/format-independent.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e84-c_5_485/_p
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@ARTICLE{e84-c_5_485,
author={Soichiro ARAKI, Naoya HENMI, Yoshiharu MAENO, Kazuhiko MATSUDA, Osamu NAKAKUBO, Masayuki SHINOHARA, Yoshihiko SUEMURA, Akio TAJIMA, Hiroaki TAKAHASHI, Seigo TAKAHASHI, Hiromi KOGANEMARU, Ken-ichi SAISHO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Photonic Core Node Based on a 2.56-Terabit/s Opto-Electronic Switching Fabric},
year={2001},
volume={E84-C},
number={5},
pages={485-492},
abstract={This paper proposes Photonic Core Node based on a 2.56-Terabit/s opto-electronic switching fabric, which can economically handle the rapidly increasing multimedia traffics, such as Internet traffic. We have successfully developed the first prototype of Photonic Core Node. The prototype consists of a single-stage full-crossbar opto-electronic switching fabric, super-packet buffers for input queuing, and a desynchronized-round-robin scheduler. The switching fabric is upgradable up to 2.56 Tb/s, and employs wavelength-division-multiplexing techniques, which dramatically reduce the total number of optical switching elements down to one-eighth the number of those used in a conventional switching fabric. The super-packet buffer assembles 16 ATM cells routed to the same output port into a single fixed-length packet. The super-packet-switching scheme drastically reduces the overhead of optical switching from 32 to 2.9%, although it tends to decrease effective throughput. The desynchronized-round-robin scheduler maintains nearly 100% effective throughput for random traffic, recursively resolving the contention of connection requests in one scheduling routine while keeping fairness in a round robin manner. The proposed Photonic Core Node can accommodate not only ATM switching but also WDM optical path grooming/multiplexing, and IP routing by using IP input buffer interfaces, because optical switches are bit-rate/format-independent.},
keywords={},
doi={},
ISSN={},
month={May},}
부
TY - JOUR
TI - Photonic Core Node Based on a 2.56-Terabit/s Opto-Electronic Switching Fabric
T2 - IEICE TRANSACTIONS on Electronics
SP - 485
EP - 492
AU - Soichiro ARAKI
AU - Naoya HENMI
AU - Yoshiharu MAENO
AU - Kazuhiko MATSUDA
AU - Osamu NAKAKUBO
AU - Masayuki SHINOHARA
AU - Yoshihiko SUEMURA
AU - Akio TAJIMA
AU - Hiroaki TAKAHASHI
AU - Seigo TAKAHASHI
AU - Hiromi KOGANEMARU
AU - Ken-ichi SAISHO
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E84-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2001
AB - This paper proposes Photonic Core Node based on a 2.56-Terabit/s opto-electronic switching fabric, which can economically handle the rapidly increasing multimedia traffics, such as Internet traffic. We have successfully developed the first prototype of Photonic Core Node. The prototype consists of a single-stage full-crossbar opto-electronic switching fabric, super-packet buffers for input queuing, and a desynchronized-round-robin scheduler. The switching fabric is upgradable up to 2.56 Tb/s, and employs wavelength-division-multiplexing techniques, which dramatically reduce the total number of optical switching elements down to one-eighth the number of those used in a conventional switching fabric. The super-packet buffer assembles 16 ATM cells routed to the same output port into a single fixed-length packet. The super-packet-switching scheme drastically reduces the overhead of optical switching from 32 to 2.9%, although it tends to decrease effective throughput. The desynchronized-round-robin scheduler maintains nearly 100% effective throughput for random traffic, recursively resolving the contention of connection requests in one scheduling routine while keeping fairness in a round robin manner. The proposed Photonic Core Node can accommodate not only ATM switching but also WDM optical path grooming/multiplexing, and IP routing by using IP input buffer interfaces, because optical switches are bit-rate/format-independent.
ER -