The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
최근에 우리는 토글 저장 루프로 구성된 급속 단일 플럭스 양자 NOT 게이트를 시연했습니다. 본 논문에서는 합류 버퍼를 부착하여 NOT 게이트를 직접적으로 확장한 NOR 게이트의 설계와 작동을 제시합니다. 시뮬레이션에서 ±28%보다 넓은 매개변수 마진이 확인되었습니다. Nb 집적 회로를 사용한 기능 테스트에서는 바이어스 마진이 ±21%인 올바른 NOR 작동이 입증되었습니다.
Yoshinao MIZUGAKI
The University of Electro-Communi-cations
Koki YAMAZAKI
The University of Electro-Communi-cations
Hiroshi SHIMADA
The University of Electro-Communi-cations
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
부
Yoshinao MIZUGAKI, Koki YAMAZAKI, Hiroshi SHIMADA, "Rapid Single-Flux-Quantum NOR Logic Gate Realized through the Use of Toggle Storage Loop" in IEICE TRANSACTIONS on Electronics,
vol. E103-C, no. 10, pp. 547-549, October 2020, doi: 10.1587/transele.2020ECS6005.
Abstract: Recently, we demonstrated a rapid-single-flux-quantum NOT gate comprising a toggle storage loop. In this paper, we present our design and operation of a NOR gate that is a straightforward extension of the NOT gate by attaching a confluence buffer. Parameter margins wider than ±28% were confirmed in simulation. Functional tests using Nb integrated circuits demonstrated correct NOR operation with a bias margin of ±21%.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2020ECS6005/_p
부
@ARTICLE{e103-c_10_547,
author={Yoshinao MIZUGAKI, Koki YAMAZAKI, Hiroshi SHIMADA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Rapid Single-Flux-Quantum NOR Logic Gate Realized through the Use of Toggle Storage Loop},
year={2020},
volume={E103-C},
number={10},
pages={547-549},
abstract={Recently, we demonstrated a rapid-single-flux-quantum NOT gate comprising a toggle storage loop. In this paper, we present our design and operation of a NOR gate that is a straightforward extension of the NOT gate by attaching a confluence buffer. Parameter margins wider than ±28% were confirmed in simulation. Functional tests using Nb integrated circuits demonstrated correct NOR operation with a bias margin of ±21%.},
keywords={},
doi={10.1587/transele.2020ECS6005},
ISSN={1745-1353},
month={October},}
부
TY - JOUR
TI - Rapid Single-Flux-Quantum NOR Logic Gate Realized through the Use of Toggle Storage Loop
T2 - IEICE TRANSACTIONS on Electronics
SP - 547
EP - 549
AU - Yoshinao MIZUGAKI
AU - Koki YAMAZAKI
AU - Hiroshi SHIMADA
PY - 2020
DO - 10.1587/transele.2020ECS6005
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E103-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2020
AB - Recently, we demonstrated a rapid-single-flux-quantum NOT gate comprising a toggle storage loop. In this paper, we present our design and operation of a NOR gate that is a straightforward extension of the NOT gate by attaching a confluence buffer. Parameter margins wider than ±28% were confirmed in simulation. Functional tests using Nb integrated circuits demonstrated correct NOR operation with a bias margin of ±21%.
ER -