The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
고집적 CMOS 메모리 회로에서 단일 이벤트 발생을 예상하려면 메모리 셀 간의 전하 공유에 대한 정량적 평가가 필요합니다. 본 연구에서는 중이온 입사로 인한 전하 공유 영역을 소자 시뮬레이션 기반 방법을 이용하여 정량적으로 계산하였다. 이 방법의 타당성은 하전된 중이온 가속기를 사용하여 실험적으로 확인되었습니다.
Akifumi MARU
JAXA,Tokyo Institute of Technology
Akifumi MATSUDA
Tokyo Institute of Technology
Satoshi KUBOYAMA
JAXA
Mamoru YOSHIMOTO
Tokyo Institute of Technology
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
부
Akifumi MARU, Akifumi MATSUDA, Satoshi KUBOYAMA, Mamoru YOSHIMOTO, "Simulation-Based Understanding of “Charge-Sharing Phenomenon” Induced by Heavy-Ion Incident on a 65nm Bulk CMOS Memory Circuit" in IEICE TRANSACTIONS on Electronics,
vol. E105-C, no. 1, pp. 47-50, January 2022, doi: 10.1587/transele.2021ECS6008.
Abstract: In order to expect the single event occurrence on highly integrated CMOS memory circuit, quantitative evaluation of charge sharing between memory cells is needed. In this study, charge sharing area induced by heavy ion incident is quantitatively calculated by using device-simulation-based method. The validity of this method is experimentally confirmed using the charged heavy ion accelerator.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2021ECS6008/_p
부
@ARTICLE{e105-c_1_47,
author={Akifumi MARU, Akifumi MATSUDA, Satoshi KUBOYAMA, Mamoru YOSHIMOTO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Simulation-Based Understanding of “Charge-Sharing Phenomenon” Induced by Heavy-Ion Incident on a 65nm Bulk CMOS Memory Circuit},
year={2022},
volume={E105-C},
number={1},
pages={47-50},
abstract={In order to expect the single event occurrence on highly integrated CMOS memory circuit, quantitative evaluation of charge sharing between memory cells is needed. In this study, charge sharing area induced by heavy ion incident is quantitatively calculated by using device-simulation-based method. The validity of this method is experimentally confirmed using the charged heavy ion accelerator.},
keywords={},
doi={10.1587/transele.2021ECS6008},
ISSN={1745-1353},
month={January},}
부
TY - JOUR
TI - Simulation-Based Understanding of “Charge-Sharing Phenomenon” Induced by Heavy-Ion Incident on a 65nm Bulk CMOS Memory Circuit
T2 - IEICE TRANSACTIONS on Electronics
SP - 47
EP - 50
AU - Akifumi MARU
AU - Akifumi MATSUDA
AU - Satoshi KUBOYAMA
AU - Mamoru YOSHIMOTO
PY - 2022
DO - 10.1587/transele.2021ECS6008
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E105-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 2022
AB - In order to expect the single event occurrence on highly integrated CMOS memory circuit, quantitative evaluation of charge sharing between memory cells is needed. In this study, charge sharing area induced by heavy ion incident is quantitatively calculated by using device-simulation-based method. The validity of this method is experimentally confirmed using the charged heavy ion accelerator.
ER -