The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
본 논문에서는 단일 종단 SRAM에 적합한 기준 전압 자체 선택 의사 차동 감지 방식을 제안합니다. 제안된 센싱 방식은 오프셋 방향에 따라 서로 다른 기준 전압을 선택할 수 있다. 새로운 센싱 방식을 사용하면 읽기 동작 시 읽기 비트라인의 스윙이 기존 도미노와 유사 차동 감지 증폭기 센싱 방식에 비해 각각 74.6%, 45.5% 감소한다. 따라서 읽기 작업의 지연 및 전력 소모가 크게 개선됩니다. 표준 55nm CMOS를 기반으로 한 시뮬레이션 결과는 기존 도미노 및 의사 차동 감지 방식과 비교하여 감지 지연이 66.4% 및 47.7% 개선되었으며, 전력 소비가 각각 31.4% 및 22.5% 개선되었음을 보여줍니다. 감지 방식의 면적은 의사 차동 감지 증폭기 감지 방식에 비해 50.8% 증가했지만 전체 SRAM 영역에 미치는 영향은 거의 없습니다.
Dashan SHI
Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS),University of Chinese Academy of Sciences (UCAS)
Heng YOU
Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS),University of Chinese Academy of Sciences (UCAS)
Jia YUAN
Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS),University of Chinese Academy of Sciences (UCAS)
Yulian WANG
Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS),University of Chinese Academy of Sciences (UCAS)
Shushan QIAO
Institute of Microelectronics of the Chinese Academy of Sciences (IMECAS),University of Chinese Academy of Sciences (UCAS)
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부
Dashan SHI, Heng YOU, Jia YUAN, Yulian WANG, Shushan QIAO, "A Low-Power High-Speed Sensing Scheme for Single-Ended SRAM" in IEICE TRANSACTIONS on Electronics,
vol. E105-C, no. 11, pp. 712-719, November 2022, doi: 10.1587/transele.2022ECP5008.
Abstract: In this paper, a reference-voltage self-selected pseudo-differential sensing scheme suitable for single-ended SRAM is proposed. The proposed sensing scheme can select different reference voltage according to the offset direction. With the employment of the new sensing scheme, the swing of the read bit-line in the read operation is reduced by 74.6% and 45.5% compared to the conventional domino and the pseudo-differential sense amplifier sensing scheme, respectively. Therefore, the delay and power consumption of the read operation are significantly improved. Simulation results based on a standard 55nm CMOS show that compared with the conventional domino and pseudo-differential sensing schemes, the sensing delay is improved by 66.4% and 47.7%, and the power consumption is improved by 31.4% and 22.5%, respectively. Although the area of the sensing scheme is increased by 50.8% compared with the pseudo-differential sense amplifier sensing scheme, it has little effect on the entire SRAM area.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.2022ECP5008/_p
부
@ARTICLE{e105-c_11_712,
author={Dashan SHI, Heng YOU, Jia YUAN, Yulian WANG, Shushan QIAO, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Low-Power High-Speed Sensing Scheme for Single-Ended SRAM},
year={2022},
volume={E105-C},
number={11},
pages={712-719},
abstract={In this paper, a reference-voltage self-selected pseudo-differential sensing scheme suitable for single-ended SRAM is proposed. The proposed sensing scheme can select different reference voltage according to the offset direction. With the employment of the new sensing scheme, the swing of the read bit-line in the read operation is reduced by 74.6% and 45.5% compared to the conventional domino and the pseudo-differential sense amplifier sensing scheme, respectively. Therefore, the delay and power consumption of the read operation are significantly improved. Simulation results based on a standard 55nm CMOS show that compared with the conventional domino and pseudo-differential sensing schemes, the sensing delay is improved by 66.4% and 47.7%, and the power consumption is improved by 31.4% and 22.5%, respectively. Although the area of the sensing scheme is increased by 50.8% compared with the pseudo-differential sense amplifier sensing scheme, it has little effect on the entire SRAM area.},
keywords={},
doi={10.1587/transele.2022ECP5008},
ISSN={1745-1353},
month={November},}
부
TY - JOUR
TI - A Low-Power High-Speed Sensing Scheme for Single-Ended SRAM
T2 - IEICE TRANSACTIONS on Electronics
SP - 712
EP - 719
AU - Dashan SHI
AU - Heng YOU
AU - Jia YUAN
AU - Yulian WANG
AU - Shushan QIAO
PY - 2022
DO - 10.1587/transele.2022ECP5008
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E105-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 2022
AB - In this paper, a reference-voltage self-selected pseudo-differential sensing scheme suitable for single-ended SRAM is proposed. The proposed sensing scheme can select different reference voltage according to the offset direction. With the employment of the new sensing scheme, the swing of the read bit-line in the read operation is reduced by 74.6% and 45.5% compared to the conventional domino and the pseudo-differential sense amplifier sensing scheme, respectively. Therefore, the delay and power consumption of the read operation are significantly improved. Simulation results based on a standard 55nm CMOS show that compared with the conventional domino and pseudo-differential sensing schemes, the sensing delay is improved by 66.4% and 47.7%, and the power consumption is improved by 31.4% and 22.5%, respectively. Although the area of the sensing scheme is increased by 50.8% compared with the pseudo-differential sense amplifier sensing scheme, it has little effect on the entire SRAM area.
ER -