The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
본 논문에서는 DVB-S2 애플리케이션을 위한 새로운 고대역폭 및 넓은 동적 범위 전력 검출기를 갖춘 완전한 디지털 이득 제어 시스템을 제시합니다. DVB-S2 시스템의 PAPR(피크 대 평균 전력비)이 너무 높고 정착 시간 요구 사항이 매우 엄격하기 때문에 기존의 폐쇄 루프 아날로그 이득 제어 방식을 사용할 수 없습니다. 강력한 이득 제어와 기저대역 모뎀과의 직접적인 디지털 인터페이스를 위해서는 디지털 이득 제어가 필요합니다. 또한 정착 시간과 프로세스, 전압 및 온도 변화에 대한 둔감성 측면에서 아날로그 이득 제어에 비해 몇 가지 장점이 있습니다. 미세한 스텝 분해능으로 넓은 이득 범위를 갖기 위해 새로운 AGC 시스템이 제안되었습니다. 이 시스템은 고대역폭 디지털 VGA, RMS 감지기를 갖춘 넓은 동적 범위 전력 감지기, 저전력 SAR 유형 ADC 및 디지털 이득 컨트롤러로 구성됩니다. 소비전력과 칩 면적을 줄이기 위해 SAR형 ADC를 0.25개만 사용하고, 입력은 10개의 전력 감지기를 기반으로 시간 인터리빙됩니다. 시뮬레이션 및 측정 결과는 새로운 AGC 시스템이 0.18dB 미만의 이득 오류로 80μs 이내에 원하는 수준으로 수렴되는 것을 보여줍니다. 0.25 µm CMOS 공정으로 구현됩니다. 제안된 IF AGC 시스템의 측정 결과는 8-dB 분해능에서 XNUMX-dB 이득 범위를 나타냅니다.nV/
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부
YoungGun PU, Kang-Yoon LEE, "A Fully Digital AGC System with 100 MHz Bandwidth and 35 dB Dynamic Range Power Detectors for DVB-S2 Application" in IEICE TRANSACTIONS on Electronics,
vol. E92-C, no. 1, pp. 127-134, January 2009, doi: 10.1587/transele.E92.C.127.
Abstract: This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within 10 µs. It is implemented in a 0.18 µm CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8nV/
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E92.C.127/_p
부
@ARTICLE{e92-c_1_127,
author={YoungGun PU, Kang-Yoon LEE, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Fully Digital AGC System with 100 MHz Bandwidth and 35 dB Dynamic Range Power Detectors for DVB-S2 Application},
year={2009},
volume={E92-C},
number={1},
pages={127-134},
abstract={This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within 10 µs. It is implemented in a 0.18 µm CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8nV/
keywords={},
doi={10.1587/transele.E92.C.127},
ISSN={1745-1353},
month={January},}
부
TY - JOUR
TI - A Fully Digital AGC System with 100 MHz Bandwidth and 35 dB Dynamic Range Power Detectors for DVB-S2 Application
T2 - IEICE TRANSACTIONS on Electronics
SP - 127
EP - 134
AU - YoungGun PU
AU - Kang-Yoon LEE
PY - 2009
DO - 10.1587/transele.E92.C.127
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E92-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 2009
AB - This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within 10 µs. It is implemented in a 0.18 µm CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8nV/
ER -