The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
저전력 K-대역 CMOS 전류 모드 상향 변환 믹서가 제안되었습니다. 제안하는 믹서는 0.13개의 아날로그 전류 제곱 회로를 사용하여 구현된다. 이 전류 모드 상향 변환 믹서는 1μm 8P5M 삼중 웰 CMOS 공정으로 제작되었으며 측정된 전력 변환 이득은 -3.1dB입니다. 제작된 CMOS 상향 변환 믹서는 1V 공급 전압에서 단 20.8mW만 소비합니다. VCO는 22.7GHz에서 108GHz까지 조정할 수 있습니다. 위상 잡음은 10MHz 오프셋 주파수에서 -XNUMXdBc/Hz입니다. 제안된 믹서는 고급 nano-CMOS 기술의 저전압 및 저전력 CMOS 송신기 프런트 엔드에 대한 큰 잠재력을 가지고 있는 것으로 나타났습니다.
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부
Wen-Chieh WANG, Chung-Yu WU, "A Low-Power K-Band CMOS Current-Mode Up-Conversion Mixer Integrated with VCO" in IEICE TRANSACTIONS on Electronics,
vol. E92-C, no. 10, pp. 1291-1298, October 2009, doi: 10.1587/transele.E92.C.1291.
Abstract: A low-power K-band CMOS current-mode up-conversion mixer is proposed. The proposed mixer is realized using four analog current-squaring circuits. This current-mode up-conversion mixer is fabricated in 0.13-µm 1P8M triple-well CMOS process, and has the measured power conversion gain of -5 dB. The fabricated CMOS up-conversion mixer dissipates only 3.1 mW from a 1-V supply voltage. The VCO can be tuned from 20.8 GHz to 22.7 GHz. Its phase noise is -108 dBc/Hz at 10-MHz offset frequency. It is shown that the proposed mixer has great potential for low-voltage and low-power CMOS transmitter front-ends in advanced nano-CMOS technologies.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E92.C.1291/_p
부
@ARTICLE{e92-c_10_1291,
author={Wen-Chieh WANG, Chung-Yu WU, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Low-Power K-Band CMOS Current-Mode Up-Conversion Mixer Integrated with VCO},
year={2009},
volume={E92-C},
number={10},
pages={1291-1298},
abstract={A low-power K-band CMOS current-mode up-conversion mixer is proposed. The proposed mixer is realized using four analog current-squaring circuits. This current-mode up-conversion mixer is fabricated in 0.13-µm 1P8M triple-well CMOS process, and has the measured power conversion gain of -5 dB. The fabricated CMOS up-conversion mixer dissipates only 3.1 mW from a 1-V supply voltage. The VCO can be tuned from 20.8 GHz to 22.7 GHz. Its phase noise is -108 dBc/Hz at 10-MHz offset frequency. It is shown that the proposed mixer has great potential for low-voltage and low-power CMOS transmitter front-ends in advanced nano-CMOS technologies.},
keywords={},
doi={10.1587/transele.E92.C.1291},
ISSN={1745-1353},
month={October},}
부
TY - JOUR
TI - A Low-Power K-Band CMOS Current-Mode Up-Conversion Mixer Integrated with VCO
T2 - IEICE TRANSACTIONS on Electronics
SP - 1291
EP - 1298
AU - Wen-Chieh WANG
AU - Chung-Yu WU
PY - 2009
DO - 10.1587/transele.E92.C.1291
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E92-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2009
AB - A low-power K-band CMOS current-mode up-conversion mixer is proposed. The proposed mixer is realized using four analog current-squaring circuits. This current-mode up-conversion mixer is fabricated in 0.13-µm 1P8M triple-well CMOS process, and has the measured power conversion gain of -5 dB. The fabricated CMOS up-conversion mixer dissipates only 3.1 mW from a 1-V supply voltage. The VCO can be tuned from 20.8 GHz to 22.7 GHz. Its phase noise is -108 dBc/Hz at 10-MHz offset frequency. It is shown that the proposed mixer has great potential for low-voltage and low-power CMOS transmitter front-ends in advanced nano-CMOS technologies.
ER -