The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
디지털 제어 발진기(DCO)에 대해 MIM(Metal-Insulator-Metal) 커패시터 대신 소형 커패시터를 사용하여 미세 주파수 튜닝 단계를 구현하는 방법이 제안되었습니다. 이 작은 커패시터는 6μm CMOS 기술의 6개 금속층(M0.18) 주조소에서 비대칭으로 배열된 동일 평면 전송 라인으로 구현됩니다. 이러한 전송선 기반 커패시터는 전자기장 시뮬레이터를 사용하여 설계되었으며 SPICE 시뮬레이터를 사용하여 공동 설계되었습니다. 마지막으로 이러한 커패시터를 사용하여 15비트 DCO를 설계하고 제안된 DCO를 0.18μm CMOS 기술로 제작하고 테스트했습니다. 측정된 DCO의 위상 잡음은 -118.3dBc/Hz(@1MHz 오프셋 주파수)였으며, 발진 주파수는 4.86kHz의 최소 주파수 튜닝 단계에서 5.36GHz에서 18GHz까지 튜닝되었습니다.
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부
Ramesh K. POKHAREL, Kenta UCHIDA, Abhishek TOMAR, Haruichi KANAYA, Keiji YOSHIDA, "Low Phase Noise, 18 kHz Frequency Tuning Step, 5 GHz, 15 bit Digitally Controlled Oscillator in 0.18 µm CMOS Technology" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 7, pp. 1007-1013, July 2010, doi: 10.1587/transele.E93.C.1007.
Abstract: A method to realize the fine frequency-tuning steps using tiny capacitors instead of Metal-Insulator-Metal (MIM) capacitors is proposed for a digitally controlled oscillator (DCO). The tiny capacitors are realized by the coplanar transmission lines which are arranged unsymmetrical in a 6 metal layers (M6) foundry of 0.18 µm CMOS technology. These transmission line based capacitors are designed by using electro-magnetic field simulator, and co-designed by using SPICE simulator. Finally, these capacitors are employed to design 15 bit DCO and fabricated the proposed DCO in 0.18 µm CMOS technology, and tested. The measured phase noise of DCO was -118.3 dBc/Hz (@1 MHz offset frequency), and the oscillating frequency tuned from 4.86 GHz to 5.36 GHz in the minimum frequency-tuning step of 18 kHz.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.1007/_p
부
@ARTICLE{e93-c_7_1007,
author={Ramesh K. POKHAREL, Kenta UCHIDA, Abhishek TOMAR, Haruichi KANAYA, Keiji YOSHIDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Low Phase Noise, 18 kHz Frequency Tuning Step, 5 GHz, 15 bit Digitally Controlled Oscillator in 0.18 µm CMOS Technology},
year={2010},
volume={E93-C},
number={7},
pages={1007-1013},
abstract={A method to realize the fine frequency-tuning steps using tiny capacitors instead of Metal-Insulator-Metal (MIM) capacitors is proposed for a digitally controlled oscillator (DCO). The tiny capacitors are realized by the coplanar transmission lines which are arranged unsymmetrical in a 6 metal layers (M6) foundry of 0.18 µm CMOS technology. These transmission line based capacitors are designed by using electro-magnetic field simulator, and co-designed by using SPICE simulator. Finally, these capacitors are employed to design 15 bit DCO and fabricated the proposed DCO in 0.18 µm CMOS technology, and tested. The measured phase noise of DCO was -118.3 dBc/Hz (@1 MHz offset frequency), and the oscillating frequency tuned from 4.86 GHz to 5.36 GHz in the minimum frequency-tuning step of 18 kHz.},
keywords={},
doi={10.1587/transele.E93.C.1007},
ISSN={1745-1353},
month={July},}
부
TY - JOUR
TI - Low Phase Noise, 18 kHz Frequency Tuning Step, 5 GHz, 15 bit Digitally Controlled Oscillator in 0.18 µm CMOS Technology
T2 - IEICE TRANSACTIONS on Electronics
SP - 1007
EP - 1013
AU - Ramesh K. POKHAREL
AU - Kenta UCHIDA
AU - Abhishek TOMAR
AU - Haruichi KANAYA
AU - Keiji YOSHIDA
PY - 2010
DO - 10.1587/transele.E93.C.1007
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 2010
AB - A method to realize the fine frequency-tuning steps using tiny capacitors instead of Metal-Insulator-Metal (MIM) capacitors is proposed for a digitally controlled oscillator (DCO). The tiny capacitors are realized by the coplanar transmission lines which are arranged unsymmetrical in a 6 metal layers (M6) foundry of 0.18 µm CMOS technology. These transmission line based capacitors are designed by using electro-magnetic field simulator, and co-designed by using SPICE simulator. Finally, these capacitors are employed to design 15 bit DCO and fabricated the proposed DCO in 0.18 µm CMOS technology, and tested. The measured phase noise of DCO was -118.3 dBc/Hz (@1 MHz offset frequency), and the oscillating frequency tuned from 4.86 GHz to 5.36 GHz in the minimum frequency-tuning step of 18 kHz.
ER -