The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
NAND형 플래시 메모리 어레이의 프로그램 동작을 수행함에 있어서, 프로그램 금지된 셀에는 게이트, 즉 플로팅 채널의 워드라인(WL)에 양의 전압이 인가되고, 프로그램 셀에는 프로그램 전압이 인가된다. 두 끝, DSL(드레인 선택 라인)과 SSL(소스 선택 라인)이 접지된 비트 라인(BL)으로 켜집니다. 이러한 방식으로 원치 않는 프로그램 작동을 방지하기 위한 실리콘 채널의 자체 부스팅이 가능해졌습니다. 플래시 메모리 장치가 공격적으로 축소되고 이에 따라 채널 도핑 농도가 증가함에 따라 셀프 부스팅 방식의 중요한 요소인 WL, FG(플로팅 게이트)/스토리지 노드 및 실리콘 채널 간의 결합 현상이 개선되어야 합니다. 더 철저하게 조사했습니다. 본 연구에서는 벌크 실리콘 기반의 2-D 기존 평면 및 3-D FinFET NAND 유형 플래시 메모리 장치에서 채널 길이와 도핑 농도에 대한 채널 전위의 자체 부스팅 의존성을 2-D 및 3-D 및 XNUMX차원 수치 장치 시뮬레이션. 물리적 프로빙을 통해 채널 전위를 측정하는 현실적인 방법이 거의 없기 때문에 일련의 시뮬레이션 작업은 플래시 메모리 장치 내부의 채널 전위 변화에 대한 실질적인 통찰력을 제공한다고 믿어집니다.
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Seongjae CHO, Jung Hoon LEE, Yoon KIM, Jang-Gn YUN, Hyungcheol SHIN, Byung-Gook PARK, "Simulation Study on Dependence of Channel Potential Self-Boosting on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 5, pp. 596-601, May 2010, doi: 10.1587/transele.E93.C.596.
Abstract: In performing the program operation of the NAND-type flash memory array, the program-inhibited cell is applied by a positive voltage at the gate, i.e., word-line (WL) on the floating channel while the program cell is applied by program voltage as the two ends, drain select line (DSL) and source select line (SSL), are turned on with grounded bit-line (BL). In this manner, the self-boosting of silicon channel to avoid unwanted program operation is made possible. As the flash memory device is aggressively scaled down and the channel doping concentration is increased accordingly, the coupling phenomena among WL, floating gate (FG)/storage node, and silicon channel, which are crucial factors in the self-boosting scheme, should be investigated more thoroughly. In this work, the dependences of self-boosting of channel potential on channel length and doping concentration in the 2-D conventional planar and 3-D FinFET NAND-type flash memory devices based on bulk-silicon are investigated by both 2-D and 3-D numerical device simulations. Since there hardly exists realistic ways of measuring the channel potential by physical probing, the series of simulation works are believed to offer practical insights in the variation of channel potential inside a flash memory device.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.596/_p
부
@ARTICLE{e93-c_5_596,
author={Seongjae CHO, Jung Hoon LEE, Yoon KIM, Jang-Gn YUN, Hyungcheol SHIN, Byung-Gook PARK, },
journal={IEICE TRANSACTIONS on Electronics},
title={Simulation Study on Dependence of Channel Potential Self-Boosting on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices},
year={2010},
volume={E93-C},
number={5},
pages={596-601},
abstract={In performing the program operation of the NAND-type flash memory array, the program-inhibited cell is applied by a positive voltage at the gate, i.e., word-line (WL) on the floating channel while the program cell is applied by program voltage as the two ends, drain select line (DSL) and source select line (SSL), are turned on with grounded bit-line (BL). In this manner, the self-boosting of silicon channel to avoid unwanted program operation is made possible. As the flash memory device is aggressively scaled down and the channel doping concentration is increased accordingly, the coupling phenomena among WL, floating gate (FG)/storage node, and silicon channel, which are crucial factors in the self-boosting scheme, should be investigated more thoroughly. In this work, the dependences of self-boosting of channel potential on channel length and doping concentration in the 2-D conventional planar and 3-D FinFET NAND-type flash memory devices based on bulk-silicon are investigated by both 2-D and 3-D numerical device simulations. Since there hardly exists realistic ways of measuring the channel potential by physical probing, the series of simulation works are believed to offer practical insights in the variation of channel potential inside a flash memory device.},
keywords={},
doi={10.1587/transele.E93.C.596},
ISSN={1745-1353},
month={May},}
부
TY - JOUR
TI - Simulation Study on Dependence of Channel Potential Self-Boosting on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices
T2 - IEICE TRANSACTIONS on Electronics
SP - 596
EP - 601
AU - Seongjae CHO
AU - Jung Hoon LEE
AU - Yoon KIM
AU - Jang-Gn YUN
AU - Hyungcheol SHIN
AU - Byung-Gook PARK
PY - 2010
DO - 10.1587/transele.E93.C.596
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2010
AB - In performing the program operation of the NAND-type flash memory array, the program-inhibited cell is applied by a positive voltage at the gate, i.e., word-line (WL) on the floating channel while the program cell is applied by program voltage as the two ends, drain select line (DSL) and source select line (SSL), are turned on with grounded bit-line (BL). In this manner, the self-boosting of silicon channel to avoid unwanted program operation is made possible. As the flash memory device is aggressively scaled down and the channel doping concentration is increased accordingly, the coupling phenomena among WL, floating gate (FG)/storage node, and silicon channel, which are crucial factors in the self-boosting scheme, should be investigated more thoroughly. In this work, the dependences of self-boosting of channel potential on channel length and doping concentration in the 2-D conventional planar and 3-D FinFET NAND-type flash memory devices based on bulk-silicon are investigated by both 2-D and 3-D numerical device simulations. Since there hardly exists realistic ways of measuring the channel potential by physical probing, the series of simulation works are believed to offer practical insights in the variation of channel potential inside a flash memory device.
ER -