The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
온칩과 오프칩의 상호 연결 분석은 고속 신호 처리, 디지털 통신 및 마이크로파 전자 시스템 설계에 매우 중요합니다. 상호 연결이 전자기 분석을 통해 샘플링된 데이터로 특성화되는 경우 네트워크의 회로 수준 시뮬레이션에는 샘플링된 데이터의 합리적인 근사치가 필요합니다. 샘플링된 데이터의 주파수 대역은 10GHz 이상이기 때문에 유리 함수는 여러 주파수 지점에서 이에 맞아야 합니다. 유리 함수는 직교 최소제곱법을 사용하여 근사화됩니다. 최소제곱법은 피팅 데이터의 수가 증가함에 따라 특이점 문제가 발생합니다. 이를 방지하기 위해 본 논문에서는 샘플링된 데이터를 계층적으로 근사화합니다. 또한, 회로 수준 시뮬레이션의 계산 비용을 줄이기 위해 상호 연결의 매개변수 행렬을 하나의 공통 분모 다항식을 갖는 유리수 행렬로 근사화하고 선택적 직교화 절차를 제시합니다.
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부
Yuichi TANJI, Mamoru TANAKA, "Hierarchical Least-Squares Algorithm for Macromodeling High-Speed Interconnects Characterized by Sampled Data" in IEICE TRANSACTIONS on Fundamentals,
vol. E83-A, no. 9, pp. 1833-1843, September 2000, doi: .
Abstract: The interconnect analysis of on- and off-chips is very important in the design of high-speed signal processing, digital communication, and microwave electronic systems. When the interconnects are characterized by sampled data via electromagnetic analysis, the circuit-level simulation of the network requires rational approximation of the sampled data. Since the frequency band of the sampled data is more than 10 GHz, the rational function must fit into it at many frequency points. The rational function is approximated using the orthogonal least-squares method. With an increase in the number of the fitting data, the least-squares method suffers from a singularity problem. To avoid this, the sampled data are hierarchically approximated in this paper. Moreover, to reduce the computational cost of the circuit-level simulation, the parameter matrix of the interconnects is approximated by a rational matrix with one common denominator polynomial, and the selective orthogonalization procedure is presented.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e83-a_9_1833/_p
부
@ARTICLE{e83-a_9_1833,
author={Yuichi TANJI, Mamoru TANAKA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Hierarchical Least-Squares Algorithm for Macromodeling High-Speed Interconnects Characterized by Sampled Data},
year={2000},
volume={E83-A},
number={9},
pages={1833-1843},
abstract={The interconnect analysis of on- and off-chips is very important in the design of high-speed signal processing, digital communication, and microwave electronic systems. When the interconnects are characterized by sampled data via electromagnetic analysis, the circuit-level simulation of the network requires rational approximation of the sampled data. Since the frequency band of the sampled data is more than 10 GHz, the rational function must fit into it at many frequency points. The rational function is approximated using the orthogonal least-squares method. With an increase in the number of the fitting data, the least-squares method suffers from a singularity problem. To avoid this, the sampled data are hierarchically approximated in this paper. Moreover, to reduce the computational cost of the circuit-level simulation, the parameter matrix of the interconnects is approximated by a rational matrix with one common denominator polynomial, and the selective orthogonalization procedure is presented.},
keywords={},
doi={},
ISSN={},
month={September},}
부
TY - JOUR
TI - Hierarchical Least-Squares Algorithm for Macromodeling High-Speed Interconnects Characterized by Sampled Data
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1833
EP - 1843
AU - Yuichi TANJI
AU - Mamoru TANAKA
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E83-A
IS - 9
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - September 2000
AB - The interconnect analysis of on- and off-chips is very important in the design of high-speed signal processing, digital communication, and microwave electronic systems. When the interconnects are characterized by sampled data via electromagnetic analysis, the circuit-level simulation of the network requires rational approximation of the sampled data. Since the frequency band of the sampled data is more than 10 GHz, the rational function must fit into it at many frequency points. The rational function is approximated using the orthogonal least-squares method. With an increase in the number of the fitting data, the least-squares method suffers from a singularity problem. To avoid this, the sampled data are hierarchically approximated in this paper. Moreover, to reduce the computational cost of the circuit-level simulation, the parameter matrix of the interconnects is approximated by a rational matrix with one common denominator polynomial, and the selective orthogonalization procedure is presented.
ER -