The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
SoC 시스템에서 지능을 구현하기 위해 병합된 아날로그-디지털 회로 아키텍처가 제안되었습니다. 펄스 변조 신호는 시간 영역 대규모 병렬 아날로그 신호 처리를 위해 도입되었으며 SoC VLSI 칩 내에서 자연스럽게 아날로그와 디지털 세계를 인터페이스하기 위해 도입되었습니다. 펄스 영역 선형 산술 처리의 원리와 응용을 탐구하고, 그 결과를 비선형 진동을 갖는 임의 카오스 생성 및 연속시간 동적 시스템을 포함한 비선형 신호 처리로 확장합니다. 제안된 아키텍처를 사용하는 회로의 실리콘 구현이 완전히 설명됩니다.
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Atsushi IWATA, Takashi MORIE, Makoto NAGATA, "Merged Analog-Digital Circuits Using Pulse Modulation for Intelligent SoC Applications" in IEICE TRANSACTIONS on Fundamentals,
vol. E84-A, no. 2, pp. 486-496, February 2001, doi: .
Abstract: A merged analog-digital circuit architecture is proposed for implementing intelligence in SoC systems. Pulse modulation signals are introduced for time-domain massively parallel analog signal processing, and also for interfacing analog and digital worlds naturally within the SoC VLSI chip. Principles and applications of pulse-domain linear arithmetic processing are explored, and the results are expanded to the nonlinear signal processing, including an arbitrary chaos generation and continuous-time dynamical systems with nonlinear oscillation. Silicon implementations of the circuits employing the proposed architecture are fully described.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e84-a_2_486/_p
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@ARTICLE{e84-a_2_486,
author={Atsushi IWATA, Takashi MORIE, Makoto NAGATA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Merged Analog-Digital Circuits Using Pulse Modulation for Intelligent SoC Applications},
year={2001},
volume={E84-A},
number={2},
pages={486-496},
abstract={A merged analog-digital circuit architecture is proposed for implementing intelligence in SoC systems. Pulse modulation signals are introduced for time-domain massively parallel analog signal processing, and also for interfacing analog and digital worlds naturally within the SoC VLSI chip. Principles and applications of pulse-domain linear arithmetic processing are explored, and the results are expanded to the nonlinear signal processing, including an arbitrary chaos generation and continuous-time dynamical systems with nonlinear oscillation. Silicon implementations of the circuits employing the proposed architecture are fully described.},
keywords={},
doi={},
ISSN={},
month={February},}
부
TY - JOUR
TI - Merged Analog-Digital Circuits Using Pulse Modulation for Intelligent SoC Applications
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 486
EP - 496
AU - Atsushi IWATA
AU - Takashi MORIE
AU - Makoto NAGATA
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E84-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2001
AB - A merged analog-digital circuit architecture is proposed for implementing intelligence in SoC systems. Pulse modulation signals are introduced for time-domain massively parallel analog signal processing, and also for interfacing analog and digital worlds naturally within the SoC VLSI chip. Principles and applications of pulse-domain linear arithmetic processing are explored, and the results are expanded to the nonlinear signal processing, including an arbitrary chaos generation and continuous-time dynamical systems with nonlinear oscillation. Silicon implementations of the circuits employing the proposed architecture are fully described.
ER -