The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
NOT 기능 구현을 위한 아날로그 인버터는 전압 모드 아날로그 및 디지털 신호 처리에 없어서는 안 될 회로 요소입니다. 본 논문에서는 두 개의 뉴런-MOS 트랜지스터만으로 구성된 새로운 아날로그 인버터를 제안한다. 아날로그 인버터에는 모든 입력 범위의 포화 영역에서 두 개의 뉴런-MOS 트랜지스터를 모두 작동시키는 가중 네거티브 피드백 메커니즘이 있습니다. HSPICE 시뮬레이션을 이용한 검증에서 아날로그 인버터는 모든 입력 범위에서 약 40[mV]의 오차로 높은 선형성을 보이며, 특히 19% 이상의 입력 범위에서 90[mV] 미만의 오차를 보인다. 그리고, 표준 CMOS 인버터의 피크는 공급전압 1.5[V]에서 30[μW] 내외임에도 불구하고, 아날로그 인버터의 최대 소비전력은 3.0[μW] 미만이다. 이러한 좋은 안정성과 결과는 부정적인 피드백에 의해 생성됩니다. 또한 별도의 공정 없이 기존의 CMOS 공정으로 뉴런-MOS 트랜지스터를 구현할 수 있어 아날로그 인버터의 제조 비용을 최소화할 수 있다. 아날로그 인버터 적용을 위해 잡음 마진이 높은 전압 비교기를 설계하고 전압 모드에서 XNUMX입력 MAX 및 XNUMX입력 MIN 회로에 적용합니다. MAX 및 MIN 기능 구현을 위한 MAX 및 MIN 회로는 각각 총 XNUMX개의 트랜지스터로 구성될 수 있다. 검증에서도 좋은 성능을 발휘합니다. 제안된 회로를 기반으로 거의 모든 고성능 전압 모드 다치 논리 회로를 현재의 이진 논리 시스템처럼 구현할 수 있다. 그리고 제안된 회로는 퍼지 제어와 같은 아날로그 신호 처리에서 신호 형태의 임의 변환에 대한 높은 선형성과 이점을 최대한 발휘할 수 있다.
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Motoi INABA, Koichi TANNO, Okihiko ISHIZUKA, "Analog Inverter with Neuron-MOS Transistors and Its Application" in IEICE TRANSACTIONS on Fundamentals,
vol. E85-A, no. 2, pp. 360-365, February 2002, doi: .
Abstract: The analog inverter for realization of the NOT function is the indispensable circuit element in the voltage-mode analog and digital signal processing. In this paper, we propose a novel analog inverter composed of only two neuron-MOS transistors. The analog inverter has the weighted negative feedback mechanism to operate both of neuron-MOS transistors under the saturation region in all input ranges. In verification using HSPICE simulations, the analog inverter performs the high linearity with errors of approximately 40 [mV] in all input ranges, particularly errors of less than 19 [mV] in more than 90% of input ranges. And, the maximum power consumption of the analog inverter is less than 1.5 [µW] although a peak of a standard CMOS inverter is around 30 [µW] under the supply voltage of 3.0 [V]. These good stability and results are produced by the negative feedback. Furthermore, fabrication costs of the analog inverters can be kept at the minimum because neuron-MOS transistors can be actualized in a conventional CMOS process without any additional process. For applications of the analog inverter, the voltage comparator with high noise margins is designed and is applied to the two-input MAX and the two-input MIN circuits in the voltage-mode. The MAX and the MIN circuits for realization of the MAX and the MIN functions, respectively, can be composed of total ten transistors each. They also perform well in verifications. On the basis of the proposed circuits, almost all of voltage-mode multi-valued logic circuits with high-performance can be realized like present binary logic systems. And, the proposed circuits can give full play to the high linearity and advantages for the arbitrary transformation of signal forms in the analog signal processing such as the fuzzy control.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e85-a_2_360/_p
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@ARTICLE{e85-a_2_360,
author={Motoi INABA, Koichi TANNO, Okihiko ISHIZUKA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Analog Inverter with Neuron-MOS Transistors and Its Application},
year={2002},
volume={E85-A},
number={2},
pages={360-365},
abstract={The analog inverter for realization of the NOT function is the indispensable circuit element in the voltage-mode analog and digital signal processing. In this paper, we propose a novel analog inverter composed of only two neuron-MOS transistors. The analog inverter has the weighted negative feedback mechanism to operate both of neuron-MOS transistors under the saturation region in all input ranges. In verification using HSPICE simulations, the analog inverter performs the high linearity with errors of approximately 40 [mV] in all input ranges, particularly errors of less than 19 [mV] in more than 90% of input ranges. And, the maximum power consumption of the analog inverter is less than 1.5 [µW] although a peak of a standard CMOS inverter is around 30 [µW] under the supply voltage of 3.0 [V]. These good stability and results are produced by the negative feedback. Furthermore, fabrication costs of the analog inverters can be kept at the minimum because neuron-MOS transistors can be actualized in a conventional CMOS process without any additional process. For applications of the analog inverter, the voltage comparator with high noise margins is designed and is applied to the two-input MAX and the two-input MIN circuits in the voltage-mode. The MAX and the MIN circuits for realization of the MAX and the MIN functions, respectively, can be composed of total ten transistors each. They also perform well in verifications. On the basis of the proposed circuits, almost all of voltage-mode multi-valued logic circuits with high-performance can be realized like present binary logic systems. And, the proposed circuits can give full play to the high linearity and advantages for the arbitrary transformation of signal forms in the analog signal processing such as the fuzzy control.},
keywords={},
doi={},
ISSN={},
month={February},}
부
TY - JOUR
TI - Analog Inverter with Neuron-MOS Transistors and Its Application
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 360
EP - 365
AU - Motoi INABA
AU - Koichi TANNO
AU - Okihiko ISHIZUKA
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E85-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2002
AB - The analog inverter for realization of the NOT function is the indispensable circuit element in the voltage-mode analog and digital signal processing. In this paper, we propose a novel analog inverter composed of only two neuron-MOS transistors. The analog inverter has the weighted negative feedback mechanism to operate both of neuron-MOS transistors under the saturation region in all input ranges. In verification using HSPICE simulations, the analog inverter performs the high linearity with errors of approximately 40 [mV] in all input ranges, particularly errors of less than 19 [mV] in more than 90% of input ranges. And, the maximum power consumption of the analog inverter is less than 1.5 [µW] although a peak of a standard CMOS inverter is around 30 [µW] under the supply voltage of 3.0 [V]. These good stability and results are produced by the negative feedback. Furthermore, fabrication costs of the analog inverters can be kept at the minimum because neuron-MOS transistors can be actualized in a conventional CMOS process without any additional process. For applications of the analog inverter, the voltage comparator with high noise margins is designed and is applied to the two-input MAX and the two-input MIN circuits in the voltage-mode. The MAX and the MIN circuits for realization of the MAX and the MIN functions, respectively, can be composed of total ten transistors each. They also perform well in verifications. On the basis of the proposed circuits, almost all of voltage-mode multi-valued logic circuits with high-performance can be realized like present binary logic systems. And, the proposed circuits can give full play to the high linearity and advantages for the arbitrary transformation of signal forms in the analog signal processing such as the fuzzy control.
ER -