The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
JPEG2000의 인코딩/디코딩 프로세스는 주로 엔트로피 인코딩/디코딩의 복잡성으로 인해 기존 JPEG보다 훨씬 더 많은 계산 능력을 필요로 합니다. 따라서 일반적으로 엔트로피 인코딩/디코딩을 처리하기 위해 여러 엔트로피 코덱 하드웨어 모듈이 병렬로 구현됩니다. 그러나 이 모듈은 중간 데이터를 저장하기 위해 작은 크기의 메모리를 많이 요구하며, 하나의 칩에 여러 모듈을 구현하는 경우 많은 수의 SRAM을 사용하면 전체 칩 레이아웃이 어려워집니다. 본 논문에서는 엔트로피 인코딩/디코딩 모듈을 위한 효율적인 메모리 구성 프레임워크를 제안하며, 기존 메모리 구성뿐만 아니라 제안된 새로운 메모리 구성 방법을 시도하여 탐색할 설계 공간을 확장합니다. 결과적으로, 목표 공정 기술에 대한 효율적인 메모리 구성을 탐색할 수 있습니다.
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Hiroki SUGANO, Takahiko MASUZAKI, Hiroshi TSUTSUI, Takao ONOYE, Hiroyuki OCHI, Yukihiro NAKAMURA, "Efficient Memory Organization Framework for JPEG2000 Entropy Codec" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 8, pp. 1970-1977, August 2009, doi: 10.1587/transfun.E92.A.1970.
Abstract: The encoding/decoding process of JPEG2000 requires much more computation power than that of conventional JPEG mainly due to the complexity of the entropy encoding/decoding. Thus usually multiple entropy codec hardware modules are implemented in parallel to process the entropy encoding/decoding. This module, however, requests many small-size memories to store intermediate data, and when multiple modules are implemented on a chip, employment of the large number of SRAMs increases difficulty of whole chip layout. In this paper, an efficient memory organization framework for the entropy encoding/decoding module is proposed, in which not only existing memory organizations but also our proposed novel memory organization methods are attempted to expand the design space to be explored. As a result, the efficient memory organization for a target process technology can be explored.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.1970/_p
부
@ARTICLE{e92-a_8_1970,
author={Hiroki SUGANO, Takahiko MASUZAKI, Hiroshi TSUTSUI, Takao ONOYE, Hiroyuki OCHI, Yukihiro NAKAMURA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Efficient Memory Organization Framework for JPEG2000 Entropy Codec},
year={2009},
volume={E92-A},
number={8},
pages={1970-1977},
abstract={The encoding/decoding process of JPEG2000 requires much more computation power than that of conventional JPEG mainly due to the complexity of the entropy encoding/decoding. Thus usually multiple entropy codec hardware modules are implemented in parallel to process the entropy encoding/decoding. This module, however, requests many small-size memories to store intermediate data, and when multiple modules are implemented on a chip, employment of the large number of SRAMs increases difficulty of whole chip layout. In this paper, an efficient memory organization framework for the entropy encoding/decoding module is proposed, in which not only existing memory organizations but also our proposed novel memory organization methods are attempted to expand the design space to be explored. As a result, the efficient memory organization for a target process technology can be explored.},
keywords={},
doi={10.1587/transfun.E92.A.1970},
ISSN={1745-1337},
month={August},}
부
TY - JOUR
TI - Efficient Memory Organization Framework for JPEG2000 Entropy Codec
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1970
EP - 1977
AU - Hiroki SUGANO
AU - Takahiko MASUZAKI
AU - Hiroshi TSUTSUI
AU - Takao ONOYE
AU - Hiroyuki OCHI
AU - Yukihiro NAKAMURA
PY - 2009
DO - 10.1587/transfun.E92.A.1970
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 8
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - August 2009
AB - The encoding/decoding process of JPEG2000 requires much more computation power than that of conventional JPEG mainly due to the complexity of the entropy encoding/decoding. Thus usually multiple entropy codec hardware modules are implemented in parallel to process the entropy encoding/decoding. This module, however, requests many small-size memories to store intermediate data, and when multiple modules are implemented on a chip, employment of the large number of SRAMs increases difficulty of whole chip layout. In this paper, an efficient memory organization framework for the entropy encoding/decoding module is proposed, in which not only existing memory organizations but also our proposed novel memory organization methods are attempted to expand the design space to be explored. As a result, the efficient memory organization for a target process technology can be explored.
ER -