The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
본 논문에서는 AES에서 요구되는 다양한 변환의 하위 기능에 새로운 CSE(common-expression-elimination) 기법을 적용하여 AES(Advanced Encryption Standard) 프로세서의 공간 효율적인 설계를 제안한다. 제안하는 방법은 새로운 CSE 알고리즘을 이용하여 이들 하위 함수의 비트 단위 XOR/AND 기반 Sum-of-product 표현에서 공통인자를 추출함으로써 하위 함수 구현에 필요한 면적 비용을 줄인다. 셀 기반 구현 결과는 우리가 제안한 CSE 방법을 적용한 AES 프로세서가 이전 설계에 비해 면적이 크게 향상되었음을 보여줍니다.
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부
Ming-Chih CHEN, Shen-Fu HSIAO, "Low Cost Design of an Advanced Encryption Standard (AES) Processor Using a New Common-Subexpression-Elimination Algorithm" in IEICE TRANSACTIONS on Fundamentals,
vol. E92-A, no. 12, pp. 3221-3228, December 2009, doi: 10.1587/transfun.E92.A.3221.
Abstract: In this paper, we propose an area-efficient design of Advanced Encryption Standard (AES) processor by applying a new common-expression-elimination (CSE) method to the sub-functions of various transformations required in AES. The proposed method reduces the area cost of realizing the sub-functions by extracting the common factors in the bit-level XOR/AND-based sum-of-product expressions of these sub-functions using a new CSE algorithm. Cell-based implementation results show that the AES processor with our proposed CSE method has significant area improvement compared with previous designs.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E92.A.3221/_p
부
@ARTICLE{e92-a_12_3221,
author={Ming-Chih CHEN, Shen-Fu HSIAO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Low Cost Design of an Advanced Encryption Standard (AES) Processor Using a New Common-Subexpression-Elimination Algorithm},
year={2009},
volume={E92-A},
number={12},
pages={3221-3228},
abstract={In this paper, we propose an area-efficient design of Advanced Encryption Standard (AES) processor by applying a new common-expression-elimination (CSE) method to the sub-functions of various transformations required in AES. The proposed method reduces the area cost of realizing the sub-functions by extracting the common factors in the bit-level XOR/AND-based sum-of-product expressions of these sub-functions using a new CSE algorithm. Cell-based implementation results show that the AES processor with our proposed CSE method has significant area improvement compared with previous designs.},
keywords={},
doi={10.1587/transfun.E92.A.3221},
ISSN={1745-1337},
month={December},}
부
TY - JOUR
TI - Low Cost Design of an Advanced Encryption Standard (AES) Processor Using a New Common-Subexpression-Elimination Algorithm
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3221
EP - 3228
AU - Ming-Chih CHEN
AU - Shen-Fu HSIAO
PY - 2009
DO - 10.1587/transfun.E92.A.3221
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E92-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2009
AB - In this paper, we propose an area-efficient design of Advanced Encryption Standard (AES) processor by applying a new common-expression-elimination (CSE) method to the sub-functions of various transformations required in AES. The proposed method reduces the area cost of realizing the sub-functions by extracting the common factors in the bit-level XOR/AND-based sum-of-product expressions of these sub-functions using a new CSE algorithm. Cell-based implementation results show that the AES processor with our proposed CSE method has significant area improvement compared with previous designs.
ER -