The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
나노 규모 기술을 사용하는 SOC(시스템 온 칩) 설계는 여러 소스의 재사용 가능한 여러 코어로 구성될 수 있습니다. 이로 인해 SOC 테스트의 복잡성은 기존 VLSI 칩 테스트의 복잡성보다 훨씬 높습니다. SOC 테스트 과제 중 하나는 테스트 데이터 감소입니다. 본 논문에서는 테스트 데이터의 양과 테스트 적용 시간을 줄이기 위한 MCC(Multi-Code Compression) 기법을 제시한다. 압축된 테스트 데이터를 복구하기 위한 다중 코드 압축 해제기도 제안됩니다. 실험 결과는 MCC 방식이 단일 코드 압축 방식보다 높은 압축률을 달성할 수 있음을 보여줍니다. 제안된 다중 코드 압축 해제기의 면적 비용은 약 3498μm에 불과합니다.2 TSMC 0.18 µm 표준 셀 기술을 기반으로 합니다.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
부
Hong-Ming SHIEH, Jin-Fu LI, "A Multi-Code Compression Scheme for Test Time Reduction of System-on-Chip Designs" in IEICE TRANSACTIONS on Information,
vol. E91-D, no. 10, pp. 2428-2434, October 2008, doi: 10.1093/ietisy/e91-d.10.2428.
Abstract: With the nano-scale technology, an system-on-chip (SOC) design may consist of many reusable cores from multiple sources. This causes that the complexity of SOC testing is much higher than that of conventional VLSI chip testing. One of the SOC test challenges is the test data reduction. This paper presents a multi-code compression (MCC) technique to reduce the volume of test data and the test application time. A multi-code decompressor for recovering the compressed test data is also proposed. Experimental results show that the MCC scheme can achieve higher compression ratio than single-code compression schemes. The area cost of the proposed multi-code decompressor is small--only about 3498 µm2 based on TSMC 0.18 µm standard cell technology.
URL: https://global.ieice.org/en_transactions/information/10.1093/ietisy/e91-d.10.2428/_p
부
@ARTICLE{e91-d_10_2428,
author={Hong-Ming SHIEH, Jin-Fu LI, },
journal={IEICE TRANSACTIONS on Information},
title={A Multi-Code Compression Scheme for Test Time Reduction of System-on-Chip Designs},
year={2008},
volume={E91-D},
number={10},
pages={2428-2434},
abstract={With the nano-scale technology, an system-on-chip (SOC) design may consist of many reusable cores from multiple sources. This causes that the complexity of SOC testing is much higher than that of conventional VLSI chip testing. One of the SOC test challenges is the test data reduction. This paper presents a multi-code compression (MCC) technique to reduce the volume of test data and the test application time. A multi-code decompressor for recovering the compressed test data is also proposed. Experimental results show that the MCC scheme can achieve higher compression ratio than single-code compression schemes. The area cost of the proposed multi-code decompressor is small--only about 3498 µm2 based on TSMC 0.18 µm standard cell technology.},
keywords={},
doi={10.1093/ietisy/e91-d.10.2428},
ISSN={1745-1361},
month={October},}
부
TY - JOUR
TI - A Multi-Code Compression Scheme for Test Time Reduction of System-on-Chip Designs
T2 - IEICE TRANSACTIONS on Information
SP - 2428
EP - 2434
AU - Hong-Ming SHIEH
AU - Jin-Fu LI
PY - 2008
DO - 10.1093/ietisy/e91-d.10.2428
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E91-D
IS - 10
JA - IEICE TRANSACTIONS on Information
Y1 - October 2008
AB - With the nano-scale technology, an system-on-chip (SOC) design may consist of many reusable cores from multiple sources. This causes that the complexity of SOC testing is much higher than that of conventional VLSI chip testing. One of the SOC test challenges is the test data reduction. This paper presents a multi-code compression (MCC) technique to reduce the volume of test data and the test application time. A multi-code decompressor for recovering the compressed test data is also proposed. Experimental results show that the MCC scheme can achieve higher compression ratio than single-code compression schemes. The area cost of the proposed multi-code decompressor is small--only about 3498 µm2 based on TSMC 0.18 µm standard cell technology.
ER -