The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
SRAM 기반 FPGA의 프로그래밍 회로는 두 개의 시프트 레지스터, 제어 회로 및 구성 메모리(SRAM) 셀 어레이로 구성됩니다. 구성 메모리 셀 어레이는 RAM에 대한 기존 테스트 방법으로 쉽게 테스트할 수 있으므로 시프트 레지스터 테스트에 중점을 둡니다. 먼저 추가 하드웨어를 사용하지 않고 프로그래밍 회로의 기능만 사용하여 수행할 수 있는 시프트 레지스터에 대한 테스트 절차를 도출합니다. 다음으로 테스트 절차의 타당성을 보여줍니다. 마지막으로 Xilinx XC4025를 테스트하기 위한 테스트 절차의 적용을 보여줍니다.
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Hiroyuki MICHINISHI, Tokumi YOKOHIRA, Takuji OKAMOTO, Tomoo INOUE, Hideo FUJIWARA, "Testing for the Programming Circuit of SRAM-Based FPGAs" in IEICE TRANSACTIONS on Information,
vol. E82-D, no. 6, pp. 1051-1057, June 1999, doi: .
Abstract: The programming circuit of SRAM-based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We first derive test procedures for the shift registers, which can be done by using only the faculties of the programming circuit, without using additional hardware. Next, we show the validness of the test procedures. Finally, we show an application of the test procedures to test Xilinx XC4025.
URL: https://global.ieice.org/en_transactions/information/10.1587/e82-d_6_1051/_p
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@ARTICLE{e82-d_6_1051,
author={Hiroyuki MICHINISHI, Tokumi YOKOHIRA, Takuji OKAMOTO, Tomoo INOUE, Hideo FUJIWARA, },
journal={IEICE TRANSACTIONS on Information},
title={Testing for the Programming Circuit of SRAM-Based FPGAs},
year={1999},
volume={E82-D},
number={6},
pages={1051-1057},
abstract={The programming circuit of SRAM-based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We first derive test procedures for the shift registers, which can be done by using only the faculties of the programming circuit, without using additional hardware. Next, we show the validness of the test procedures. Finally, we show an application of the test procedures to test Xilinx XC4025.},
keywords={},
doi={},
ISSN={},
month={June},}
부
TY - JOUR
TI - Testing for the Programming Circuit of SRAM-Based FPGAs
T2 - IEICE TRANSACTIONS on Information
SP - 1051
EP - 1057
AU - Hiroyuki MICHINISHI
AU - Tokumi YOKOHIRA
AU - Takuji OKAMOTO
AU - Tomoo INOUE
AU - Hideo FUJIWARA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E82-D
IS - 6
JA - IEICE TRANSACTIONS on Information
Y1 - June 1999
AB - The programming circuit of SRAM-based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs, we focus on testing for the shift registers. We first derive test procedures for the shift registers, which can be done by using only the faculties of the programming circuit, without using additional hardware. Next, we show the validness of the test procedures. Finally, we show an application of the test procedures to test Xilinx XC4025.
ER -