The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
본 논문에서는 CMOS 로직 IC의 오픈 결함을 검출하기 위한 새로운 테스트 방법을 제안한다. 이 방식은 IC 외부에서 시변 공급 전압과 전기장을 공급해 발생하는 IC 공급 전류를 기반으로 한다. 또한 테스트 방법에 대한 테스트 입력 벡터가 제안되었으며, 이는 오류 모델 기반의 기능 테스트 방법보다 더 쉽게 생성될 수 있음을 보여줍니다. 테스트의 타당성은 몇 가지 실험을 통해 조사됩니다. 경험적 결과는 이 방법을 사용하여 CMOS IC의 개방 결함을 감지할 수 있다는 것을 약속합니다.
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Masaki HASHIZUME, Masahiro ICHIMIYA, Hiroyuki YOTSUYANAGI, Takeomi TAMESADA, "CMOS Open Defect Detection by Supply Current Measurement under Time-Variable Electric Field Supply" in IEICE TRANSACTIONS on Information,
vol. E85-D, no. 10, pp. 1542-1550, October 2002, doi: .
Abstract: In this paper, a new test method is proposed for detecting open defects in CMOS logic ICs. The method is based on supply current of ICs generated by supplying time-variable supply voltage and electric field from the outside of the ICs. Also, test input vectors for the test method are proposed and it is shown that they can be generated more easily than functional test methods based on stuck-at fault models. The feasibility of the test is examined by some experiments. The empirical results promise us that by using the method, open defects in CMOS ICs can be detected.
URL: https://global.ieice.org/en_transactions/information/10.1587/e85-d_10_1542/_p
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@ARTICLE{e85-d_10_1542,
author={Masaki HASHIZUME, Masahiro ICHIMIYA, Hiroyuki YOTSUYANAGI, Takeomi TAMESADA, },
journal={IEICE TRANSACTIONS on Information},
title={CMOS Open Defect Detection by Supply Current Measurement under Time-Variable Electric Field Supply},
year={2002},
volume={E85-D},
number={10},
pages={1542-1550},
abstract={In this paper, a new test method is proposed for detecting open defects in CMOS logic ICs. The method is based on supply current of ICs generated by supplying time-variable supply voltage and electric field from the outside of the ICs. Also, test input vectors for the test method are proposed and it is shown that they can be generated more easily than functional test methods based on stuck-at fault models. The feasibility of the test is examined by some experiments. The empirical results promise us that by using the method, open defects in CMOS ICs can be detected.},
keywords={},
doi={},
ISSN={},
month={October},}
부
TY - JOUR
TI - CMOS Open Defect Detection by Supply Current Measurement under Time-Variable Electric Field Supply
T2 - IEICE TRANSACTIONS on Information
SP - 1542
EP - 1550
AU - Masaki HASHIZUME
AU - Masahiro ICHIMIYA
AU - Hiroyuki YOTSUYANAGI
AU - Takeomi TAMESADA
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E85-D
IS - 10
JA - IEICE TRANSACTIONS on Information
Y1 - October 2002
AB - In this paper, a new test method is proposed for detecting open defects in CMOS logic ICs. The method is based on supply current of ICs generated by supplying time-variable supply voltage and electric field from the outside of the ICs. Also, test input vectors for the test method are proposed and it is shown that they can be generated more easily than functional test methods based on stuck-at fault models. The feasibility of the test is examined by some experiments. The empirical results promise us that by using the method, open defects in CMOS ICs can be detected.
ER -