The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
본 논문에서는 비단조 뉴런(비단조 DBM 네트워크)을 갖춘 결정론적 볼츠만 머신(DBM)의 하드웨어 구현에 대한 연구를 보고합니다. 하드웨어 DBM 네트워크는 다른 신경망보다 구성 요소가 적습니다. 수치 시뮬레이션 결과는 비단조 DBM 네트워크가 단조 DBM 네트워크에 비해 학습 능력이 높다는 것을 보여줍니다. 이러한 결과는 비단조 DBM 네트워크가 고기능성 뉴로칩 구현에 큰 잠재력을 가지고 있음을 보여줍니다. 그리고, 비단조적인 DBM 네트워크의 뉴로칩을 설계 및 제작하였으며, 그 측정을 통해 비단조적인 뉴런을 이용하여 컴팩트한 뉴로칩에서 고기능의 대규모 신경 시스템을 구현할 수 있음을 확인하였다.
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Mitsunaga KINJO, Shigeo SATO, Koji NAKAJIMA, "Hardware Implementation of a DBM Network with Non-monotonic Neurons" in IEICE TRANSACTIONS on Information,
vol. E85-D, no. 3, pp. 558-567, March 2002, doi: .
Abstract: In this paper, we report a study on hardware implementation of a Deterministic Boltzmann Machine (DBM) with non-monotonic neurons (non-monotonic DBM network). The hardware DBM network has fewer components than other neural networks. Results from numerical simulations show that the non-monotonic DBM network has high learning ability as compared to the monotonic DBM network. These results show that the non-monotonic DBM network has large potential for the implementation of a high functional neurochip. Then, we design and fabricate a neurochip of the non-monotonic DBM network of which measurement confirms that the high-functional large-scale neural system can be realized on a compact neurochip by using the non-monotonic neurons.
URL: https://global.ieice.org/en_transactions/information/10.1587/e85-d_3_558/_p
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@ARTICLE{e85-d_3_558,
author={Mitsunaga KINJO, Shigeo SATO, Koji NAKAJIMA, },
journal={IEICE TRANSACTIONS on Information},
title={Hardware Implementation of a DBM Network with Non-monotonic Neurons},
year={2002},
volume={E85-D},
number={3},
pages={558-567},
abstract={In this paper, we report a study on hardware implementation of a Deterministic Boltzmann Machine (DBM) with non-monotonic neurons (non-monotonic DBM network). The hardware DBM network has fewer components than other neural networks. Results from numerical simulations show that the non-monotonic DBM network has high learning ability as compared to the monotonic DBM network. These results show that the non-monotonic DBM network has large potential for the implementation of a high functional neurochip. Then, we design and fabricate a neurochip of the non-monotonic DBM network of which measurement confirms that the high-functional large-scale neural system can be realized on a compact neurochip by using the non-monotonic neurons.},
keywords={},
doi={},
ISSN={},
month={March},}
부
TY - JOUR
TI - Hardware Implementation of a DBM Network with Non-monotonic Neurons
T2 - IEICE TRANSACTIONS on Information
SP - 558
EP - 567
AU - Mitsunaga KINJO
AU - Shigeo SATO
AU - Koji NAKAJIMA
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E85-D
IS - 3
JA - IEICE TRANSACTIONS on Information
Y1 - March 2002
AB - In this paper, we report a study on hardware implementation of a Deterministic Boltzmann Machine (DBM) with non-monotonic neurons (non-monotonic DBM network). The hardware DBM network has fewer components than other neural networks. Results from numerical simulations show that the non-monotonic DBM network has high learning ability as compared to the monotonic DBM network. These results show that the non-monotonic DBM network has large potential for the implementation of a high functional neurochip. Then, we design and fabricate a neurochip of the non-monotonic DBM network of which measurement confirms that the high-functional large-scale neural system can be realized on a compact neurochip by using the non-monotonic neurons.
ER -