The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
단순 전력 분석, 차등 전력 분석(DPA)과 같은 부채널 공격은 암호화 칩의 보안에 도전하는 키를 수집하는 효율적인 방법입니다. 사이드 채널 공격은 암호화 칩의 전력 추적을 기록하고 통계 분석을 통해 키를 추측합니다. 본 논문에서는 전력분석 공격의 위협을 줄이기 위해 무작위 실행과 레지스터 무작위화에 기반한 혁신적인 방법을 제안한다. DPA에 대한 능력을 강화하기 위해 데이터 실행 순서를 무작위로 동적으로 스크램블하여 전력 트레이스와 피연산자 간의 일치성을 혼란시키고, 데이터 작업 경로를 무작위화하여 중간 데이터를 저장하는 레지스터를 무작위화하는 방법입니다. 실험과 검증은 Sakura-G FPGA 플랫폼에서 수행됩니다. 그 결과, 제안한 방법을 적용하면 2만 전력 트레이스 후에도 키가 공개되지 않고 슬라이스 오버헤드가 7.23%, 처리율 비용이 3.4%만 도입되는 것으로 나타났다. 보호되지 않은 칩과 비교하면 공개 정도가 4000배 이상 증가합니다.
Wei GE
Southeast University
Shenghua CHEN
Southeast University
Benyu LIU
Southeast University
Min ZHU
Tsinghua University
Bo LIU
Southeast University
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부
Wei GE, Shenghua CHEN, Benyu LIU, Min ZHU, Bo LIU, "A Power Analysis Attack Countermeasure Based on Random Data Path Execution For CGRA" in IEICE TRANSACTIONS on Information,
vol. E103-D, no. 5, pp. 1013-1022, May 2020, doi: 10.1587/transinf.2019EDP7308.
Abstract: Side-channel Attack, such as simple power analysis and differential power analysis (DPA), is an efficient method to gather the key, which challenges the security of crypto chips. Side-channel Attack logs the power trace of the crypto chip and speculates the key by statistical analysis. To reduce the threat of power analysis attack, an innovative method based on random execution and register randomization is proposed in this paper. In order to enhance ability against DPA, the method disorders the correspondence between power trace and operands by scrambling the data execution sequence randomly and dynamically and randomize the data operation path to randomize the registers that store intermediate data. Experiments and verification are done on the Sakura-G FPGA platform. The results show that the key is not revealed after even 2 million power traces by adopting the proposed method and only 7.23% slices overhead and 3.4% throughput rate cost is introduced. Compared to unprotected chip, it increases more than 4000× measure to disclosure.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.2019EDP7308/_p
부
@ARTICLE{e103-d_5_1013,
author={Wei GE, Shenghua CHEN, Benyu LIU, Min ZHU, Bo LIU, },
journal={IEICE TRANSACTIONS on Information},
title={A Power Analysis Attack Countermeasure Based on Random Data Path Execution For CGRA},
year={2020},
volume={E103-D},
number={5},
pages={1013-1022},
abstract={Side-channel Attack, such as simple power analysis and differential power analysis (DPA), is an efficient method to gather the key, which challenges the security of crypto chips. Side-channel Attack logs the power trace of the crypto chip and speculates the key by statistical analysis. To reduce the threat of power analysis attack, an innovative method based on random execution and register randomization is proposed in this paper. In order to enhance ability against DPA, the method disorders the correspondence between power trace and operands by scrambling the data execution sequence randomly and dynamically and randomize the data operation path to randomize the registers that store intermediate data. Experiments and verification are done on the Sakura-G FPGA platform. The results show that the key is not revealed after even 2 million power traces by adopting the proposed method and only 7.23% slices overhead and 3.4% throughput rate cost is introduced. Compared to unprotected chip, it increases more than 4000× measure to disclosure.},
keywords={},
doi={10.1587/transinf.2019EDP7308},
ISSN={1745-1361},
month={May},}
부
TY - JOUR
TI - A Power Analysis Attack Countermeasure Based on Random Data Path Execution For CGRA
T2 - IEICE TRANSACTIONS on Information
SP - 1013
EP - 1022
AU - Wei GE
AU - Shenghua CHEN
AU - Benyu LIU
AU - Min ZHU
AU - Bo LIU
PY - 2020
DO - 10.1587/transinf.2019EDP7308
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E103-D
IS - 5
JA - IEICE TRANSACTIONS on Information
Y1 - May 2020
AB - Side-channel Attack, such as simple power analysis and differential power analysis (DPA), is an efficient method to gather the key, which challenges the security of crypto chips. Side-channel Attack logs the power trace of the crypto chip and speculates the key by statistical analysis. To reduce the threat of power analysis attack, an innovative method based on random execution and register randomization is proposed in this paper. In order to enhance ability against DPA, the method disorders the correspondence between power trace and operands by scrambling the data execution sequence randomly and dynamically and randomize the data operation path to randomize the registers that store intermediate data. Experiments and verification are done on the Sakura-G FPGA platform. The results show that the key is not revealed after even 2 million power traces by adopting the proposed method and only 7.23% slices overhead and 3.4% throughput rate cost is introduced. Compared to unprotected chip, it increases more than 4000× measure to disclosure.
ER -