The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. ex. Some numerals are expressed as "XNUMX".
Copyrights notice
The original paper is in English. Non-English content has been machine-translated and may contain typographical errors or mistranslations. Copyrights notice
3D 메쉬 기반 NoC에서는 서로 다른 레이어 사이, 심지어 상단과 하단 레이어 사이의 와이어 길이가 허용할 만큼 작기 때문에(3차원 메시 기반 네트워크 온 칩(Network on Chip)), IP(지능 속성) 다른 계층의 적절한 라우터에 직접 연결된 특정 계층의 코어는 메시지의 평균 대기 시간을 효율적으로 줄이고 최대 처리량을 늘릴 수 있습니다. 이러한 아이디어를 바탕으로 논문에서는 하단 레이어를 제외한 각 IP 코어가 인접한 두 레이어의 두 라우터, 특히 하단 레이어의 IP 코어에 연결되는 듀얼 포트 액세스 구조를 소개합니다. 최상위 계층의 적절한 라우터에 직접 연결할 수 있습니다. 또한 메시지의 평균 홉 수에 대한 긴밀한 형태 표현을 도출하고 듀얼 포트 액세스 구조를 사용할 때 성능에 대한 정량적 분석도 제공합니다. 모든 분석 결과는 평균 홉 수가 감소하고 평균 지연 시간이 감소하고 최대 처리량이 증가하는 등 시스템 성능이 향상되는 것으로 나타났습니다. 마지막으로, 시뮬레이션 결과는 우리의 이론적 분석을 확인하고 상대적으로 적은 면적 오버헤드 증가로 제안된 듀얼 포트 액세스 구조의 장점을 보여줍니다.
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Yuanyuan ZHANG, Shijun LIN, Li SU, Depeng JIN, Lieguang ZENG, "A Dual-Port Access Structure of 3D Mesh-Based NoC" in IEICE TRANSACTIONS on Information,
vol. E93-D, no. 7, pp. 1987-1990, July 2010, doi: 10.1587/transinf.E93.D.1987.
Abstract: Since the length of wires between different layers, even between the top and bottom layers, is acceptably small in 3D mesh-based NoC (three-Dimensional mesh-based Network on Chip), a structure in which an IP (Intelligence Property) core in a certain layer directly connected to a proper router in another layer may efficiently decrease the average latency of messages and increase the maximum throughput. With this idea, in the paper, we introduce a dual-port access structure, in which each IP core except that in the bottom layer is connected to two routers in two adjacent layers, and, in particular, the IP core in the bottom layer can be directly connected to the proper router in the top layer. Furthermore, we derive the close form expression of the average number of hops of messages and also give the quantitative analysis of the performance when the dual-port access structure is used. All the analytical results reveal that the average number of hops is reduced and the system performance is improved, including a decrease of average latency and an increase of maximum throughput. Finally, the simulation results confirm our theoretical analysis and show the advantage of the proposed dual-port access structure with a relatively small increment of area overhead.
URL: https://global.ieice.org/en_transactions/information/10.1587/transinf.E93.D.1987/_p
부
@ARTICLE{e93-d_7_1987,
author={Yuanyuan ZHANG, Shijun LIN, Li SU, Depeng JIN, Lieguang ZENG, },
journal={IEICE TRANSACTIONS on Information},
title={A Dual-Port Access Structure of 3D Mesh-Based NoC},
year={2010},
volume={E93-D},
number={7},
pages={1987-1990},
abstract={Since the length of wires between different layers, even between the top and bottom layers, is acceptably small in 3D mesh-based NoC (three-Dimensional mesh-based Network on Chip), a structure in which an IP (Intelligence Property) core in a certain layer directly connected to a proper router in another layer may efficiently decrease the average latency of messages and increase the maximum throughput. With this idea, in the paper, we introduce a dual-port access structure, in which each IP core except that in the bottom layer is connected to two routers in two adjacent layers, and, in particular, the IP core in the bottom layer can be directly connected to the proper router in the top layer. Furthermore, we derive the close form expression of the average number of hops of messages and also give the quantitative analysis of the performance when the dual-port access structure is used. All the analytical results reveal that the average number of hops is reduced and the system performance is improved, including a decrease of average latency and an increase of maximum throughput. Finally, the simulation results confirm our theoretical analysis and show the advantage of the proposed dual-port access structure with a relatively small increment of area overhead.},
keywords={},
doi={10.1587/transinf.E93.D.1987},
ISSN={1745-1361},
month={July},}
부
TY - JOUR
TI - A Dual-Port Access Structure of 3D Mesh-Based NoC
T2 - IEICE TRANSACTIONS on Information
SP - 1987
EP - 1990
AU - Yuanyuan ZHANG
AU - Shijun LIN
AU - Li SU
AU - Depeng JIN
AU - Lieguang ZENG
PY - 2010
DO - 10.1587/transinf.E93.D.1987
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E93-D
IS - 7
JA - IEICE TRANSACTIONS on Information
Y1 - July 2010
AB - Since the length of wires between different layers, even between the top and bottom layers, is acceptably small in 3D mesh-based NoC (three-Dimensional mesh-based Network on Chip), a structure in which an IP (Intelligence Property) core in a certain layer directly connected to a proper router in another layer may efficiently decrease the average latency of messages and increase the maximum throughput. With this idea, in the paper, we introduce a dual-port access structure, in which each IP core except that in the bottom layer is connected to two routers in two adjacent layers, and, in particular, the IP core in the bottom layer can be directly connected to the proper router in the top layer. Furthermore, we derive the close form expression of the average number of hops of messages and also give the quantitative analysis of the performance when the dual-port access structure is used. All the analytical results reveal that the average number of hops is reduced and the system performance is improved, including a decrease of average latency and an increase of maximum throughput. Finally, the simulation results confirm our theoretical analysis and show the advantage of the proposed dual-port access structure with a relatively small increment of area overhead.
ER -